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authorEgbert Eich <eich@suse.de>2004-07-06 14:37:47 +0000
committerEgbert Eich <eich@suse.de>2004-07-06 14:37:47 +0000
commitccd95bfb291a0c70272fab6822ef379b83dc298d (patch)
treedb891a5723ff867f114383b480014f2aafa3f037
parent6bdf3d36ea3086432af5157540fde4e0aa0c44dc (diff)
Separated Intel drivers from default DriDrivers to avoid building them on
IA64 (Egbert Eich). Fixed wrong function prototype (Egbert Eich). Don't test for generic VGA on IA64 (Egbert Eich). Fixed a segfault when accessing a structure before verifying the pointer exists (Egbert Eich). Added a showcache option for debugging (Egbert Eich). Increase default video RAM size to 16MB when DRI is enabled and more than 128MB are available (Egbert Eich). Fixed lockups during mode switch. Problem was introduced when attempting to copy the behavior during LeaveVT()/EnterVT() but but forgetting to call I810DRILeave() before I810DRIEnter(). The entire DRILeave()/Enter() scenario has been commented out as it didn't seem to be necessary (Egbert Eich). Fix TweakMemorySize() (tested with i855/i865) (Egbert Eich). increased MAX_DEVICES to 128 (Egbert Eich). Use OS provided PCI config space access as default method (Egbert Eich). Added support for Linux 2.6 proc file format. Fixed unaligned accesses to pieces of the VBE info block. VESA did not align elements to size (Egbert Eich).
-rw-r--r--src/radeon_driver.c21
1 files changed, 18 insertions, 3 deletions
diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index 221c9fb..786f6c2 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -158,8 +158,9 @@ typedef enum {
OPTION_MIN_DOTCLOCK,
#ifdef RENDER
OPTION_RENDER_ACCEL,
- OPTION_SUBPIXEL_ORDER
+ OPTION_SUBPIXEL_ORDER,
#endif
+ OPTION_SHOWCACHE
} RADEONOpts;
const OptionInfoRec RADEONOptions[] = {
@@ -202,6 +203,7 @@ const OptionInfoRec RADEONOptions[] = {
{ OPTION_RENDER_ACCEL, "RenderAccel", OPTV_BOOLEAN, {0}, FALSE },
{ OPTION_SUBPIXEL_ORDER, "SubPixelOrder", OPTV_ANYSTR, {0}, FALSE },
#endif
+ { OPTION_SHOWCACHE, "ShowCache", OPTV_BOOLEAN, {0}, FALSE },
{ -1, NULL, OPTV_NONE, {0}, FALSE }
};
@@ -2440,13 +2442,16 @@ static Bool RADEONPreInitConfig(ScrnInfoPtr pScrn)
}
}
#endif
+ xf86GetOptValBool(info->Options, OPTION_SHOWCACHE, &info->showCache);
+ if (info->showCache)
+ xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
+ "Option ShowCache enabled\n");
#ifdef RENDER
info->RenderAccel = xf86ReturnOptValBool (info->Options,
OPTION_RENDER_ACCEL, TRUE);
#endif
-
return TRUE;
}
@@ -7001,11 +7006,21 @@ void RADEONDoAdjustFrame(ScrnInfoPtr pScrn, int x, int y, int clone)
{
RADEONInfoPtr info = RADEONPTR(pScrn);
unsigned char *RADEONMMIO = info->MMIO;
- int reg, Base = y * info->CurrentLayout.displayWidth + x;
+ int reg, Base;
#ifdef XF86DRI
RADEONSAREAPrivPtr pSAREAPriv;
#endif
+ if (info->showCache && y) {
+ int lastline = info->FbMapSize /
+ ((pScrn->displayWidth * pScrn->bitsPerPixel) / 8);
+
+ lastline -= pScrn->currentMode->VDisplay;
+ y += (pScrn->virtualY - 1) * (y / 3 + 1);
+ if (y > lastline) y = lastline;
+ }
+ Base = y * info->CurrentLayout.displayWidth + x;
+
switch (info->CurrentLayout.pixel_code) {
case 15:
case 16: Base *= 2; break;