summaryrefslogtreecommitdiff
path: root/src/ct_ddc.c
blob: 3cc8dfed631f0ef5c24f553a6f035a48b5e2961e (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_ddc.c,v 1.8 2001/05/09 19:57:04 dbateman Exp $ */

/* All drivers should typically include these */
#include "xf86.h"
#include "xf86_OSproc.h"
#include "xf86_ansic.h"

/* Everything using inb/outb, etc needs "compiler.h" */
#include "compiler.h"

/* Drivers for PCI hardware need this */
#include "xf86PciInfo.h"

/* Drivers that need to access the PCI config space directly need this */
#include "xf86Pci.h"

#include "ct_driver.h"

static Bool chips_TestI2C(int scrnIndex);
static Bool chips_setI2CBits(I2CBusPtr I2CPtr, ScrnInfoPtr pScrn);

static unsigned int
chips_ddc1Read(ScrnInfoPtr pScrn)
{
    unsigned char ddc_mask = ((CHIPSPtr)pScrn->driverPrivate)->ddc_mask;
    CHIPSPtr cPtr = CHIPSPTR(pScrn);
    vgaHWPtr hwp = VGAHWPTR(pScrn);
    
    register unsigned int tmp;

    while ((hwp->readST01(hwp)) & 0x08){};
    while (!(hwp->readST01(hwp)) & 0x08){};
    tmp = cPtr->readXR(cPtr, 0x63);
    return (tmp & ddc_mask);
}

void
chips_ddc1(ScrnInfoPtr pScrn)
{
    unsigned char FR0B, FR0C, XR62;
    unsigned char mask_c = 0x00;
    unsigned char val, tmp_val = 0;
    int i;
    CHIPSPtr cPtr = CHIPSPTR(pScrn);    

    xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Probing for DDC1\n");	

    FR0C = cPtr->readFR(cPtr, 0x0C);
    XR62 = cPtr->readXR(cPtr, 0x62);
    switch (cPtr->Chipset) {
    case CHIPS_CT65550:
	cPtr->ddc_mask = 0x1F;         /* GPIO 0-4 */
	FR0B = cPtr->readFR(cPtr, 0x0B);
	if (!(FR0B & 0x10))      /* GPIO 2 is used as 32 kHz input */
	    cPtr->ddc_mask &= 0xFB;      
	if (cPtr->Bus == ChipsVLB) /* GPIO 3-7 are used as address bits */
	    cPtr->ddc_mask &= 0x07;
	break;
    case CHIPS_CT65554:
    case CHIPS_CT65555:
    case CHIPS_CT68554:
	cPtr->ddc_mask = 0x0F;        /* GPIO 0-3 */
	break;
    case CHIPS_CT69000:
    case CHIPS_CT69030:
	cPtr->ddc_mask = 0x9F;        /* GPIO 0-4,7? */
	break;
    default:
	cPtr->ddc_mask = 0x0C;       /* GPIO 2,3 */
	break;
    }
    if (!(FR0C & 0x80)) {       /* GPIO 1 is not available */
	mask_c |= 0xC0;
	cPtr->ddc_mask &= 0xFE;
    }
    if (!(FR0C & 0x10)) {       /* GPIO 0 is not available */
	mask_c |= 0x18;
	cPtr->ddc_mask &= 0xFD;
    }

    /* set GPIO 0,1 to read if available */
    cPtr->writeFR(cPtr, 0x0C, (FR0C & mask_c) | (~mask_c & 0x90));
    /* set remaining GPIO to read */
    cPtr->writeXR(cPtr, 0x62, 0x00);

    val = chips_ddc1Read(pScrn);
    for (i = 0; i < 70; i++) {
	tmp_val = chips_ddc1Read(pScrn);
	if (tmp_val != val)
	    break;
    }
    cPtr->ddc_mask = val ^ tmp_val;
    if (cPtr->ddc_mask)
	xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "DDC1 found\n");	
    else return;

    xf86PrintEDID(xf86DoEDID_DDC1(pScrn->scrnIndex,vgaHWddc1SetSpeed,
				  chips_ddc1Read));

    /* restore */
    cPtr->writeFR(cPtr, 0x0C, FR0C);
    cPtr->writeXR(cPtr, 0x62, XR62);
}

static void
chips_I2CGetBits(I2CBusPtr b, int *clock, int *data) 
{
    CHIPSI2CPtr pI2C_c = (CHIPSI2CPtr) (b->DriverPrivate.ptr);  
    unsigned char FR0C, XR62, val;

    FR0C = pI2C_c->cPtr->readFR(pI2C_c->cPtr, 0x0C);
    if (pI2C_c->i2cDataBit & 0x01 || pI2C_c->i2cClockBit & 0x01)
	FR0C = (FR0C & 0xE7) | 0x10;
    if (pI2C_c->i2cDataBit & 0x02 || pI2C_c->i2cClockBit & 0x02)
	FR0C = (FR0C & 0x3F) | 0x80;
    XR62 = pI2C_c->cPtr->readXR(pI2C_c->cPtr, 0x62);
    XR62 &= (~pI2C_c->i2cDataBit) & (~pI2C_c->i2cClockBit);
    pI2C_c->cPtr->writeFR(pI2C_c->cPtr, 0x0C, FR0C);
    pI2C_c->cPtr->writeXR(pI2C_c->cPtr, 0x62, XR62);
    val = pI2C_c->cPtr->readXR(pI2C_c->cPtr, 0x63);
    *clock = (val & pI2C_c->i2cClockBit) != 0;
    *data  = (val & pI2C_c->i2cDataBit) != 0;
}

static void
chips_I2CPutBits(I2CBusPtr b, int clock, int data)
{
    CHIPSI2CPtr pI2C_c = (CHIPSI2CPtr) (b->DriverPrivate.ptr);  
    unsigned char FR0C, XR62, val;

    FR0C = pI2C_c->cPtr->readFR(pI2C_c->cPtr, 0x0C);
    if (((pI2C_c->i2cDataBit & 0x01) && data)
	|| ((pI2C_c->i2cClockBit & 0x01) && clock))
	FR0C |=  0x18;
    else if ((pI2C_c->i2cDataBit & 0x01)
	|| (pI2C_c->i2cClockBit & 0x01))
	FR0C |=  0x10;
    if (((pI2C_c->i2cDataBit & 0x02) && data)
	|| ((pI2C_c->i2cClockBit & 0x02) && clock))
	FR0C |=  0xC0;
    else if ((pI2C_c->i2cDataBit & 0x02)
	     || (pI2C_c->i2cClockBit & 0x02))
	FR0C |=  0x80;
    XR62 = pI2C_c->cPtr->readXR(pI2C_c->cPtr, 0x62);
    XR62 = (XR62 & ~pI2C_c->i2cClockBit) | (clock ? pI2C_c->i2cClockBit : 0);
    XR62 = (XR62 & ~pI2C_c->i2cDataBit) | (data ? pI2C_c->i2cDataBit : 0);
    pI2C_c->cPtr->writeFR(pI2C_c->cPtr, 0x0C, FR0C);
    pI2C_c->cPtr->writeXR(pI2C_c->cPtr, 0x62, XR62);
    val = pI2C_c->cPtr->readXR(pI2C_c->cPtr, 0x63);
    val = (val & ~pI2C_c->i2cClockBit) | (clock ? pI2C_c->i2cClockBit : 0);
    val = (val & ~pI2C_c->i2cDataBit) | (data ? pI2C_c->i2cDataBit : 0);
    pI2C_c->cPtr->writeXR(pI2C_c->cPtr, 0x63, val);
}


Bool
chips_i2cInit(ScrnInfoPtr pScrn)
{
    CHIPSPtr cPtr = CHIPSPTR(pScrn);
    I2CBusPtr I2CPtr;

    I2CPtr = xf86CreateI2CBusRec();
    if(!I2CPtr) return FALSE;

    cPtr->I2C = I2CPtr;

    I2CPtr->BusName    = "DDC";
    I2CPtr->scrnIndex  = pScrn->scrnIndex;
    I2CPtr->I2CPutBits = chips_I2CPutBits;
    I2CPtr->I2CGetBits = chips_I2CGetBits;
    I2CPtr->DriverPrivate.ptr = xalloc(sizeof(CHIPSI2CRec));
    ((CHIPSI2CPtr)(I2CPtr->DriverPrivate.ptr))->cPtr = cPtr;
    
    if (!xf86I2CBusInit(I2CPtr))
	return FALSE;
    
    if (!chips_setI2CBits(I2CPtr, pScrn))
	return FALSE;

    return TRUE;
}

static Bool
chips_setI2CBits(I2CBusPtr b, ScrnInfoPtr pScrn)
{
    CHIPSPtr cPtr = CHIPSPTR(pScrn);    
    CHIPSI2CPtr pI2C_c = (CHIPSI2CPtr) (b->DriverPrivate.ptr);  
    unsigned char FR0B, FR0C;
    unsigned char bits, data_bits, clock_bits;
    int i,j;

    FR0C = cPtr->readFR(cPtr, 0x0C);
    switch (cPtr->Chipset) {
    case CHIPS_CT65550:
	bits = 0x1F;         /* GPIO 0-4 */
	FR0B = cPtr->readFR(cPtr, 0x0B);
	if (!(FR0B & 0x10))      /* GPIO 2 is used as 32 kHz input */
	    bits &= 0xFB;      
	pI2C_c->i2cDataBit = 0x01;
	pI2C_c->i2cClockBit = 0x02;
	if (cPtr->Bus == ChipsVLB) /* GPIO 3-7 are used as address bits */
	    bits &= 0x07;
	break;
    case CHIPS_CT65554:
    case CHIPS_CT65555:
    case CHIPS_CT68554:
	bits = 0x0F;        /* GPIO 0-3 */
	pI2C_c->i2cDataBit = 0x04;
	pI2C_c->i2cClockBit = 0x08;
	break;
    case CHIPS_CT69000:
    case CHIPS_CT69030:
	bits = 0x9F;        /* GPIO 0-4,7? */
	pI2C_c->i2cDataBit = 0x04;
	pI2C_c->i2cClockBit = 0x08;
	break;
    default:
	bits = 0x0C;       /* GPIO 2,3 */
	pI2C_c->i2cDataBit = 0x04;
	pI2C_c->i2cClockBit = 0x08;
	break;
    }
    if (!(FR0C & 0x80)) {       /* GPIO 1 is not available */
	bits &= 0xFE;
    }
    if (!(FR0C & 0x10)) {       /* GPIO 0 is not available */
	bits &= 0xFD;
    }
    pI2C_c->i2cClockBit &= bits;
    pI2C_c->i2cDataBit &= bits;
    /*
     * first we test out the "favorite" GPIO bits ie. the ones suggested
     * by the data book; if we don't succeed test all other combinations
     * of possible GPIO pins as data/clock lines as the manufacturer might
     * have its own ideas.
     */
    if (chips_TestI2C(pScrn->scrnIndex)) return TRUE;

    data_bits = bits;
    pI2C_c->i2cDataBit = 0x01;
    for (i = 0; i<8; i++) {
	if (data_bits & 0x01) {
	    clock_bits = bits;
	    pI2C_c->i2cClockBit = 0x01;
	    for (j = 0; j<8; j++) {
		if (clock_bits & 0x01)
		    if (chips_TestI2C(pScrn->scrnIndex)) return TRUE;
		clock_bits >>= 1;
		pI2C_c->i2cClockBit <<= 1;
	    }
	}
	data_bits >>= 1;
	pI2C_c->i2cDataBit <<= 1;
    }
    /* 
     * We haven't found a valid clock/data line combination - that
     * doesn't mean there aren't any. We just haven't received an
     * answer from the relevant DDC I2C addresses. We'll have to wait
     * and see, if this is too restrictive (eg one wants to use I2C
     * for something else than DDC we might have to probe more addresses
     * or just fall back to the "favorite" GPIO lines.
     */
    return FALSE;
}

static Bool
chips_TestI2C(int scrnIndex)
{
    int i;
    I2CBusPtr b;

    b = xf86I2CFindBus(scrnIndex, "DDC");
    if (b == NULL) return FALSE;
    else {
	for(i = 0xA0; i < 0xA8; i += 2)
	    if(xf86I2CProbeAddress(b, i))
		return TRUE;
    }
    return FALSE;
}