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-rw-r--r--src/ct_driver.c133
1 files changed, 78 insertions, 55 deletions
diff --git a/src/ct_driver.c b/src/ct_driver.c
index 87ece8b..66ae8b6 100644
--- a/src/ct_driver.c
+++ b/src/ct_driver.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_driver.c,v 1.128 2003/08/23 16:09:15 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_driver.c,v 1.132tsi Exp $ */
/*
* Copyright 1993 by Jon Block <block@frc.com>
@@ -142,7 +142,7 @@ static Bool CHIPSEnterVT(int scrnIndex, int flags);
static void CHIPSLeaveVT(int scrnIndex, int flags);
static Bool CHIPSCloseScreen(int scrnIndex, ScreenPtr pScreen);
static void CHIPSFreeScreen(int scrnIndex, int flags);
-static int CHIPSValidMode(int scrnIndex, DisplayModePtr mode,
+static ModeStatus CHIPSValidMode(int scrnIndex, DisplayModePtr mode,
Bool verbose, int flags);
static Bool CHIPSSaveScreen(ScreenPtr pScreen, int mode);
@@ -158,7 +158,8 @@ static void chipsLock(ScrnInfoPtr pScrn);
static void chipsUnlock(ScrnInfoPtr pScrn);
static void chipsClockSave(ScrnInfoPtr pScrn, CHIPSClockPtr Clock);
static void chipsClockLoad(ScrnInfoPtr pScrn, CHIPSClockPtr Clock);
-static Bool chipsClockFind(ScrnInfoPtr pScrn, int no, CHIPSClockPtr Clock);
+static Bool chipsClockFind(ScrnInfoPtr pScrn, DisplayModePtr mode,
+ int no, CHIPSClockPtr Clock);
static void chipsCalcClock(ScrnInfoPtr pScrn, int Clock,
unsigned char *vclk);
static int chipsGetHWClock(ScrnInfoPtr pScrn);
@@ -581,7 +582,7 @@ static const OptionInfoRec Chips655xxOptions[] = {
{ OPTION_HW_CURSOR, "HWcursor", OPTV_BOOLEAN, {0}, FALSE },
{ OPTION_STN, "STN", OPTV_BOOLEAN, {0}, FALSE },
{ OPTION_USE_MODELINE, "UseModeline", OPTV_BOOLEAN, {0}, FALSE },
- { OPTION_LCD_STRETCH, "NoStretch", OPTV_BOOLEAN, {0}, FALSE },
+ { OPTION_LCD_STRETCH, "Stretch", OPTV_BOOLEAN, {0}, FALSE },
{ OPTION_LCD_CENTER, "LcdCenter", OPTV_BOOLEAN, {0}, FALSE },
{ OPTION_MMIO, "MMIO", OPTV_BOOLEAN, {0}, FALSE },
{ OPTION_SUSPEND_HACK, "SuspendHack", OPTV_BOOLEAN, {0}, FALSE },
@@ -623,7 +624,7 @@ static const OptionInfoRec ChipsHiQVOptions[] = {
{ OPTION_HW_CURSOR, "HWcursor", OPTV_BOOLEAN, {0}, FALSE },
{ OPTION_STN, "STN", OPTV_BOOLEAN, {0}, FALSE },
{ OPTION_USE_MODELINE, "UseModeline", OPTV_BOOLEAN, {0}, FALSE },
- { OPTION_LCD_STRETCH, "NoStretch", OPTV_BOOLEAN, {0}, FALSE },
+ { OPTION_LCD_STRETCH, "Stretch", OPTV_BOOLEAN, {0}, FALSE },
{ OPTION_LCD_CENTER, "LcdCenter", OPTV_BOOLEAN, {0}, FALSE },
{ OPTION_MMIO, "MMIO", OPTV_BOOLEAN, {0}, FALSE },
{ OPTION_FULL_MMIO, "FullMMIO", OPTV_BOOLEAN, {0}, FALSE },
@@ -748,7 +749,7 @@ static XF86ModuleVersionInfo chipsVersRec =
MODULEVENDORSTRING,
MODINFOSTRING1,
MODINFOSTRING2,
- XF86_VERSION_CURRENT,
+ XORG_VERSION_CURRENT,
CHIPS_MAJOR_VERSION, CHIPS_MINOR_VERSION, CHIPS_PATCHLEVEL,
ABI_CLASS_VIDEODRV,
ABI_VIDEODRV_VERSION,
@@ -1558,7 +1559,7 @@ chipsPreInitHiQV(ScrnInfoPtr pScrn, int flags)
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
"Enabling linear addressing\n");
xf86DrvMsg(pScrn->scrnIndex, from,
- "base address is set at 0x%X.\n", cPtr->FbAddress);
+ "base address is set at 0x%lX.\n", cPtr->FbAddress);
cPtr->IOAddress = cPtr->FbAddress + 0x400000L;
} else
xf86DrvMsg(pScrn->scrnIndex, from,
@@ -1613,10 +1614,10 @@ chipsPreInitHiQV(ScrnInfoPtr pScrn, int flags)
"PseudoColor overlay enabled.\n");
if (!xf86IsOptionSet(cPtr->Options, OPTION_LCD_STRETCH))
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
- " - Forcing option \"NoStretch\".\n");
+ " - Forcing option \"Stretch\" \"ON\".\n");
if (!xf86IsOptionSet(cPtr->Options, OPTION_LCD_CENTER))
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
- " - Forcing option \"LcdCenter\".\n");
+ " - Forcing option \"LcdCenter\" \"OFF\".\n");
if (cPtr->Flags & ChipsShadowFB) {
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
" - Disabling \"Shadow Framebuffer\".\n");
@@ -1769,10 +1770,12 @@ chipsPreInitHiQV(ScrnInfoPtr pScrn, int flags)
case CHIPS_CT69030:
/* The ct69030 has 4Mb of SGRAM integrated */
pScrn->videoRam = 4096;
+ cPtr->Flags |= Chips64BitMemory;
break;
case CHIPS_CT69000:
/* The ct69000 has 2Mb of SGRAM integrated */
pScrn->videoRam = 2048;
+ cPtr->Flags |= Chips64BitMemory;
break;
case CHIPS_CT65550:
/* XR43: DRAM interface */
@@ -1821,6 +1824,13 @@ chipsPreInitHiQV(ScrnInfoPtr pScrn, int flags)
pScrn->videoRam = 1024;
break;
}
+ /* XR43: DRAM interface */
+ /* bit 4-5 mem interface width */
+ /* 00: 32Bit */
+ /* 01: 64Bit */
+ tmp = cPtr->readXR(cPtr, 0x43);
+ if ((tmp & 0x10) == 0x10)
+ cPtr->Flags |= Chips64BitMemory;
break;
}
}
@@ -1831,6 +1841,8 @@ chipsPreInitHiQV(ScrnInfoPtr pScrn, int flags)
* This takes gives either half or the amount of memory specified
* with the Crt2Memory option
*/
+ pScrn->memPhysBase = cPtr->FbAddress;
+
if(cPtr->SecondCrtc == FALSE) {
int crt2mem = -1, adjust;
@@ -1853,12 +1865,15 @@ chipsPreInitHiQV(ScrnInfoPtr pScrn, int flags)
cPtr->FbMapSize =
cPtrEnt->masterFbMapSize = pScrn->videoRam * 1024;
cPtrEnt->slaveFbMapSize = cPtrEnt->slavevideoRam * 1024;
+ pScrn->fbOffset = 0;
} else {
cPtrEnt->slaveFbAddress = cPtr->FbAddress +
- cPtrEnt->masterFbAddress;
+ cPtrEnt->masterFbMapSize;
cPtr->FbMapSize = cPtrEnt->slaveFbMapSize;
pScrn->videoRam = cPtrEnt->slavevideoRam;
+ pScrn->fbOffset = cPtrEnt->masterFbMapSize;
}
+
cPtrEnt->refCount++;
} else {
/* Normal Handling of video ram etc */
@@ -2236,26 +2251,27 @@ chipsPreInitHiQV(ScrnInfoPtr pScrn, int flags)
cPtr->ClockMulFactor = 1;
- /* Set the min pixel clock */
- cPtr->MinClock = 11000; /* XXX Guess, need to check this */
- xf86DrvMsg(pScrn->scrnIndex, X_DEFAULT, "Min pixel clock is %7.3f MHz\n",
- (float)(cPtr->MinClock / 1000.));
- /* Set the max pixel clock */
+ /* Set the min/max pixel clock */
switch (cPtr->Chipset) {
case CHIPS_CT69030:
+ cPtr->MinClock = 3000;
cPtr->MaxClock = 170000;
break;
case CHIPS_CT69000:
+ cPtr->MinClock = 3000;
cPtr->MaxClock = 135000;
break;
case CHIPS_CT68554:
case CHIPS_CT65555:
+ cPtr->MinClock = 1000;
cPtr->MaxClock = 110000;
break;
case CHIPS_CT65554:
+ cPtr->MinClock = 1000;
cPtr->MaxClock = 95000;
break;
case CHIPS_CT65550:
+ cPtr->MinClock = 1000;
if (((cPtr->readXR(cPtr, 0x04)) & 0xF) < 6) {
if ((cPtr->readFR(cPtr, 0x0A)) & 2) {
/*5V Vcc */
@@ -2268,13 +2284,15 @@ chipsPreInitHiQV(ScrnInfoPtr pScrn, int flags)
cPtr->MaxClock = 95000; /* Revision B */
break;
}
+ xf86DrvMsg(pScrn->scrnIndex, X_DEFAULT, "Min pixel clock is %7.3f MHz\n",
+ (float)(cPtr->MinClock / 1000.));
/* Check if maxClock is limited by the MemClk. Only 70% to allow for */
/* RAS/CAS. Extra byte per memory clock needed if framebuffer used */
/* Extra byte if the overlay plane is activated */
- /* We have a 64bit wide memory bus on the 69030 and 69000, and 32bits */
- /* on the others. Thus multiply by a suitable factor */
- if ((cPtr->Chipset == CHIPS_CT69030) || (cPtr->Chipset == CHIPS_CT69000)) {
+ /* If flag Chips64BitMemory is set assume a 64bitmemory interface, */
+ /* and 32bits on the others. Thus multiply by a suitable factor */
+ if (cPtr->Flags & Chips64BitMemory) {
if (cPtr->FrameBufferSize && (cPtr->PanelType & ChipsLCD))
if (cPtr->Flags & ChipsOverlay8plus16 )
cPtr->MaxClock = min(cPtr->MaxClock, MemClk->Clk * 8 * 0.7 / 4);
@@ -2619,7 +2637,7 @@ chipsPreInitWingine(ScrnInfoPtr pScrn, int flags)
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
"Enabling linear addressing\n");
xf86DrvMsg(pScrn->scrnIndex, from,
- "base address is set at 0x%X.\n", cPtr->FbAddress);
+ "base address is set at 0x%lX.\n", cPtr->FbAddress);
if (xf86ReturnOptValBool(cPtr->Options, OPTION_MMIO, FALSE) &&
(cPtr->Flags & ChipsMMIOSupport)) {
cPtr->UseMMIO = TRUE;
@@ -3107,7 +3125,7 @@ chipsPreInit655xx(ScrnInfoPtr pScrn, int flags)
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
"Enabling linear addressing\n");
xf86DrvMsg(pScrn->scrnIndex, from,
- "base address is set at 0x%X.\n", cPtr->FbAddress);
+ "base address is set at 0x%lX.\n", cPtr->FbAddress);
if (xf86ReturnOptValBool(cPtr->Options, OPTION_MMIO, FALSE) &&
(cPtr->Flags & ChipsMMIOSupport)) {
cPtr->UseMMIO = TRUE;
@@ -3239,7 +3257,7 @@ chipsPreInit655xx(ScrnInfoPtr pScrn, int flags)
Size->HRetraceStart = ((tmp + ((xr17 & 0x04) << 9)) + 1) << 3;
tmp1 = cPtr->readXR(cPtr, 0x1A);
tmp2 = (tmp1 & 0x1F) + ((xr17 & 0x08) << 2) - (tmp & 0x3F);
- Size->HRetraceEnd = ((((tmp2 < 0) ? (tmp2 + 0x40) : tmp2) << 3)
+ Size->HRetraceEnd = ((((tmp2 & 0x080u) ? (tmp2 + 0x40) : tmp2) << 3)
+ Size->HRetraceStart);
tmp1 = cPtr->readXR(cPtr, 0x65);
tmp = cPtr->readXR(cPtr, 0x68);
@@ -4336,14 +4354,7 @@ CHIPSScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
if (cPtr->Flags & ChipsDPMSSupport)
xf86DPMSInit(pScreen, (DPMSSetProcPtr)chipsDisplayPowerManagementSet,
0);
-
-#if 0 /* #### Shouldn't be needed */
- /* Dual head, needs to fix framebuffer memory address */
- if ((cPtr->Flags & ChipsDualChannelSupport) &&
- (cPtr->SecondCrtc == TRUE))
- pScrn->memPhysBase = cPtr->FbAddress + cPtrEnt->masterFbMapSize;
-#endif
-
+
/* Wrap the current CloseScreen function */
cPtr->CloseScreen = pScreen->CloseScreen;
pScreen->CloseScreen = CHIPSCloseScreen;
@@ -4531,7 +4542,7 @@ CHIPSFreeScreen(int scrnIndex, int flags)
}
/* Optional */
-static int
+static ModeStatus
CHIPSValidMode(int scrnIndex, DisplayModePtr mode, Bool verbose, int flags)
{
ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
@@ -4691,7 +4702,7 @@ chipsClockSelect(ScrnInfoPtr pScrn, int no)
break;
default:
- if (!chipsClockFind(pScrn, no, &TmpClock))
+ if (!chipsClockFind(pScrn, NULL, no, &TmpClock))
return (FALSE);
chipsClockLoad(pScrn, &TmpClock);
}
@@ -4772,7 +4783,8 @@ chipsClockSave(ScrnInfoPtr pScrn, CHIPSClockPtr Clock)
}
static Bool
-chipsClockFind(ScrnInfoPtr pScrn, int no, CHIPSClockPtr Clock)
+chipsClockFind(ScrnInfoPtr pScrn, DisplayModePtr mode,
+ int no, CHIPSClockPtr Clock )
{
vgaHWPtr hwp = VGAHWPTR(pScrn);
CHIPSPtr cPtr = CHIPSPTR(pScrn);
@@ -4792,9 +4804,9 @@ chipsClockFind(ScrnInfoPtr pScrn, int no, CHIPSClockPtr Clock)
case HiQV_STYLE:
Clock->msr = cPtr->CRTclkInx << 2;
Clock->fr03 = cPtr->FPclkInx << 2;
- Clock->Clock = pScrn->currentMode->Clock;
+ Clock->Clock = mode ? mode->Clock : 0;
if (xf86ReturnOptValBool(cPtr->Options, OPTION_USE_MODELINE, FALSE)) {
- Clock->FPClock = pScrn->currentMode->Clock;
+ Clock->FPClock = mode ? mode->Clock : 0;
} else
Clock->FPClock = cPtr->FPclock;
break;
@@ -4833,7 +4845,7 @@ chipsClockFind(ScrnInfoPtr pScrn, int no, CHIPSClockPtr Clock)
if ((cPtr->PanelType & ChipsLCD) && cPtr->FPclock)
Clock->Clock = cPtr->FPclock;
else
- Clock->Clock = pScrn->currentMode->SynthClock;
+ Clock->Clock = mode ? mode->SynthClock : 0;
}
break;
case OLD_STYLE:
@@ -4858,7 +4870,7 @@ chipsClockFind(ScrnInfoPtr pScrn, int no, CHIPSClockPtr Clock)
} else {
Clock->msr = 3 << 2;
Clock->xr33 = 0;
- Clock->Clock = pScrn->currentMode->SynthClock;
+ Clock->Clock = mode ? mode->SynthClock : 0;
}
break;
}
@@ -5069,7 +5081,10 @@ chipsCalcClock(ScrnInfoPtr pScrn, int Clock, unsigned char *vclk)
int M, N, P = 0, PSN = 0, PSNx = 0;
int bestM = 0, bestN = 0, bestP = 0, bestPSN = 0;
- double bestError, abest = 42, bestFout = 0;
+ double abest = 42;
+#ifdef DEBUG
+ double bestFout = 0;
+#endif
double target;
double Fvco, Fout;
@@ -5177,12 +5192,13 @@ chipsCalcClock(ScrnInfoPtr pScrn, int Clock, unsigned char *vclk)
aerror = (error < 0) ? -error : error;
if (aerror < abest) {
abest = aerror;
- bestError = error;
bestM = M;
bestN = N;
bestP = P;
bestPSN = PSN;
+#ifdef DEBUG
bestFout = Fout;
+#endif
}
}
}
@@ -5371,7 +5387,7 @@ chipsModeInitHiQV(ScrnInfoPtr pScrn, DisplayModePtr mode)
pScrn->vtSema = TRUE;
/* init clock */
- if (!chipsClockFind(pScrn, mode->ClockIndex, &ChipsNew->Clock)) {
+ if (!chipsClockFind(pScrn, mode, mode->ClockIndex, &ChipsNew->Clock)) {
ErrorF("bomb 2\n");
return (FALSE);
}
@@ -5579,7 +5595,7 @@ chipsModeInitHiQV(ScrnInfoPtr pScrn, DisplayModePtr mode)
/* centering/stretching */
if (!xf86ReturnOptValBool(cPtr->Options, OPTION_SUSPEND_HACK, FALSE)) {
- if (xf86ReturnOptValBool(cPtr->Options, OPTION_LCD_STRETCH, FALSE) ||
+ if (!xf86ReturnOptValBool(cPtr->Options, OPTION_LCD_STRETCH, FALSE) ||
(cPtr->Flags & ChipsOverlay8plus16)) {
ChipsNew->FR[0x40] &= 0xDF; /* Disable Horizontal stretching */
ChipsNew->FR[0x48] &= 0xFB; /* Disable vertical stretching */
@@ -5600,7 +5616,7 @@ chipsModeInitHiQV(ScrnInfoPtr pScrn, DisplayModePtr mode)
}
}
- if ((xf86ReturnOptValBool(cPtr->Options, OPTION_LCD_CENTER, FALSE))
+ if ((xf86ReturnOptValBool(cPtr->Options, OPTION_LCD_CENTER, TRUE))
|| (cPtr->Flags & ChipsOverlay8plus16)) {
ChipsNew->FR[0x40] |= 0x3; /* Enable Horizontal centering */
ChipsNew->FR[0x48] |= 0x3; /* Enable Vertical centering */
@@ -5755,12 +5771,16 @@ chipsModeInitHiQV(ScrnInfoPtr pScrn, DisplayModePtr mode)
- (ChipsNew->FR[0x31] & 0xF0)
- (ChipsNew->FR[0x32] & 0x0F)
- ((ChipsNew->FR[0x35] & 0xF0) << 4));
- if (cPtr->PanelSize.HDisplay > mode->CrtcHDisplay)
- cPtr->OverlaySkewX += (cPtr->PanelSize.HDisplay -
- mode->CrtcHDisplay) / 2;
- if (cPtr->PanelSize.VDisplay > mode->CrtcVDisplay)
- cPtr->OverlaySkewY += (cPtr->PanelSize.VDisplay -
- mode->CrtcVDisplay) / 2;
+ if (!xf86ReturnOptValBool(cPtr->Options, OPTION_LCD_STRETCH, FALSE)
+ && xf86ReturnOptValBool(cPtr->Options, OPTION_LCD_CENTER, TRUE))
+ {
+ if (cPtr->PanelSize.HDisplay > mode->CrtcHDisplay)
+ cPtr->OverlaySkewX += (cPtr->PanelSize.HDisplay -
+ mode->CrtcHDisplay) / 2;
+ if (cPtr->PanelSize.VDisplay > mode->CrtcVDisplay)
+ cPtr->OverlaySkewY += (cPtr->PanelSize.VDisplay -
+ mode->CrtcVDisplay) / 2;
+ }
} else {
cPtr->OverlaySkewX = mode->CrtcHTotal - mode->CrtcHBlankStart - 9;
cPtr->OverlaySkewY = mode->CrtcVTotal - mode->CrtcVSyncEnd - 1;
@@ -5976,7 +5996,7 @@ chipsModeInitWingine(ScrnInfoPtr pScrn, DisplayModePtr mode)
pScrn->vtSema = TRUE;
/* init clock */
- if (!chipsClockFind(pScrn, mode->ClockIndex, &ChipsNew->Clock)) {
+ if (!chipsClockFind(pScrn, mode, mode->ClockIndex, &ChipsNew->Clock)) {
ErrorF("bomb 4\n");
return (FALSE);
}
@@ -6218,7 +6238,7 @@ chipsModeInit655xx(ScrnInfoPtr pScrn, DisplayModePtr mode)
pScrn->vtSema = TRUE;
/* init clock */
- if (!chipsClockFind(pScrn, mode->ClockIndex, &ChipsNew->Clock)) {
+ if (!chipsClockFind(pScrn, mode, mode->ClockIndex, &ChipsNew->Clock)) {
ErrorF("bomb 6\n");
return (FALSE);
}
@@ -6428,12 +6448,15 @@ chipsModeInit655xx(ScrnInfoPtr pScrn, DisplayModePtr mode)
ChipsNew->XR[0x51] |= 0x40; /* enable FP compensation */
ChipsNew->XR[0x55] |= 0x01; /* enable horiz. compensation */
ChipsNew->XR[0x57] |= 0x01; /* enable horiz. compensation */
- if (xf86ReturnOptValBool(cPtr->Options, OPTION_LCD_STRETCH,
+ if (!xf86ReturnOptValBool(cPtr->Options, OPTION_LCD_STRETCH,
FALSE)) {
if (mode->CrtcHDisplay < 1489) /* HWBug */
- ChipsNew->XR[0x55] |= 0x02; /* enable h-centering */
- else if (pScrn->bitsPerPixel == 24)
- ChipsNew->XR[0x56] = (lcdHDisplay - CrtcHDisplay) >> 1;
+ ChipsNew->XR[0x55] |= 0x02; /* enable auto h-centering */
+ else {
+ ChipsNew->XR[0x55] &= 0xFD; /* disable auto h-centering */
+ if (pScrn->bitsPerPixel == 24) /* ? */
+ ChipsNew->XR[0x56] = (lcdHDisplay - CrtcHDisplay) >> 1;
+ }
} else {
ChipsNew->XR[0x55] &= 0xFD; /* disable h-centering */
ChipsNew->XR[0x56] = 0;
@@ -6614,9 +6637,9 @@ chipsModeInit655xx(ScrnInfoPtr pScrn, DisplayModePtr mode)
}
if (cPtr->PanelType & ChipsLCD)
- ChipsNew->XR[0x51] |= 0x02;
+ ChipsNew->XR[0x51] |= 0x04;
else
- ChipsNew->XR[0x51] &= ~0x02;
+ ChipsNew->XR[0x51] &= ~0x04;
/* Program the registers */
/*vgaHWProtect(pScrn, TRUE);*/
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-21 18:50:11 +0000