Improved BE support in C&T driver (Rob Taylor, Jean-Laurent Gazelle). (Code

    adapted Egbert Eich).
Do I810EmitFlush() during screen init to make sure 2D engine is in a sane
    state (Peter Kunzmann).

5 files changed, 119 insertions, 24 deletions

diff --git a/src/ct_BltHiQV.h b/src/ct_BltHiQV.h
index 6f135bd..775aa54 100644
--- a/src/ct_BltHiQV.h
+++ b/src/ct_BltHiQV.h
@@ -4,7 +4,7 @@
 
 
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_BltHiQV.h,v 1.12 2002/11/25 14:04:58 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_BltHiQV.h,v 1.10 2000/12/06 15:35:12 eich Exp $ */
 
 /* Definitions for the Chips and Technology BitBLT engine communication. */
 /* These are done using Memory Mapped IO, of the registers */
@@ -91,6 +91,13 @@
 		      } \
 		    }
 
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+# define TWEAK_24_BE(c) \
+    c = ((c & 0xFF0000) >> 16) | (c & 0xFF00) | (( c & 0xFF) << 16)
+#else
+# define TWEAK_24_BE(c)
+#endif
+
 #define ctSETROP(op) \
   MMIO_OUT32(cPtr->MMIOBase, BR(0x4), op)
 
@@ -129,6 +136,7 @@
 }
 
 #define ctSETBGCOLOR24(c) {\
+    TWEAK_24_BE(c); \
     if ((cAcl->bgColor != (c)) || (cAcl->bgColor == -1)) { \
 	cAcl->bgColor = (c); \
         MMIO_OUT32(cPtr->MMIOBase, BR(0x1), ((c)&0xFFFFFF)); \
@@ -150,6 +158,7 @@
 }
 
 #define ctSETFGCOLOR24(c) {\
+    TWEAK_24_BE(c); \
     if ((cAcl->fgColor != (c)) || (cAcl->fgColor == -1)) { \
 	cAcl->fgColor = (c); \
         MMIO_OUT32(cPtr->MMIOBase, BR(0x2), ((c)&0xFFFFFF)); \
diff --git a/src/ct_accel.c b/src/ct_accel.c
index a02f9f3..0614609 100644
--- a/src/ct_accel.c
+++ b/src/ct_accel.c
@@ -153,7 +153,19 @@ static void  CTNAME(ReadPixmap)(ScrnInfoPtr pScrn, int x, int y, int w, int h,
 		unsigned char *dst, int dstwidth, int bpp, int depth);
 #endif
 #endif
-
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+# define BE_SWAP(pScrn,cPtr,x) \
+  if (BE_SWAP_APRETURE(pScrn,cPtr)) { \
+       CARD8 XR0A = cPtr->readXR(cPtr,0x0A); \
+       cPtr->writeXR(cPtr, 0x0A, (XR0A & 0xcf) | x); \
+  }
+
+# define BE_SWAPON(pScrn,cPtr) BE_SWAP(pScrn,cPtr,0x10)
+# define BE_SWAPOFF(pScrn,cPtr) BE_SWAP(pScrn,cPtr,0x0)
+#else
+# define BE_SWAPON(pScrn,cPtr)
+# define BE_SWAPOFF(pScrn,cPtr)
+#endif
 
 Bool 
 CTNAME(AccelInit)(ScreenPtr pScreen)
@@ -277,17 +289,24 @@ CTNAME(AccelInit)(ScreenPtr pScreen)
 
 #ifdef CHIPS_HIQV 
     infoPtr->CPUToScreenColorExpandFillFlags =
-	BIT_ORDER_IN_BYTE_MSBFIRST | CPU_TRANSFER_PAD_QWORD |
+# if X_BYTE_ORDER != X_BIG_ENDIAN
+	BIT_ORDER_IN_BYTE_MSBFIRST |
+# endif
+	CPU_TRANSFER_PAD_QWORD |
 	LEFT_EDGE_CLIPPING | LEFT_EDGE_CLIPPING_NEGATIVE_X |
 	ROP_NEEDS_SOURCE;
-#ifdef UNDOCUMENTED_FEATURE
+# ifdef UNDOCUMENTED_FEATURE
     infoPtr->ScreenToScreenColorExpandFillFlags = BIT_ORDER_IN_BYTE_MSBFIRST
 	| LEFT_EDGE_CLIPPING;
-#endif        
+# endif        
     if (cAcl->BitsPerPixel == 24) {
 	infoPtr->CPUToScreenColorExpandFillFlags |= NO_PLANEMASK;
-#ifdef UNDOCUMENTED_FEATURE
+# ifdef UNDOCUMENTED_FEATURE
 	infoPtr->ScreenToScreenColorExpandFillFlags |= NO_PLANEMASK;
+# endif
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+	if (BE_SWAP_APRETURE(pScrn,cPtr))
+	    infoPtr->CPUToScreenColorExpandFillFlags |= SYNC_AFTER_COLOR_EXPAND;
 #endif
     }
     /* The ct65550 has problems with transparency which leads to video
@@ -295,11 +314,11 @@ CTNAME(AccelInit)(ScreenPtr pScreen)
      */
     if (!(cPtr->Flags & ChipsColorTransparency)) {
 	infoPtr->CPUToScreenColorExpandFillFlags |= NO_TRANSPARENCY;
-#ifdef UNDOCUMENTED_FEATURE
+# ifdef UNDOCUMENTED_FEATURE
 	infoPtr->ScreenToScreenColorExpandFillFlags |= NO_TRANSPARENCY;
-#endif
+# endif
     }
-#else
+#else /* CHIPS_HIQV */
     infoPtr->CPUToScreenColorExpandFillFlags =
 	BIT_ORDER_IN_BYTE_MSBFIRST | CPU_TRANSFER_PAD_DWORD |
 	ROP_NEEDS_SOURCE;
@@ -309,7 +328,7 @@ CTNAME(AccelInit)(ScreenPtr pScreen)
     if (cAcl->BitsPerPixel == 24)
 	infoPtr->CPUToScreenColorExpandFillFlags |= TRIPLE_BITS_24BPP |
 	    RGB_EQUAL | NO_PLANEMASK;
-#endif
+#endif /* CHIPS_HIQV */
 
     infoPtr->SetupForCPUToScreenColorExpandFill =
 		CTNAME(SetupForCPUToScreenColorExpandFill);
@@ -458,6 +477,7 @@ CTNAME(Sync)(ScrnInfoPtr pScrn)
     CHIPSPtr cPtr = CHIPSPTR(pScrn);
     DEBUG_P("sync");
     ctBLTWAIT;
+    BE_SWAPON(pScrn,cPtr);
 }
 
 static void
@@ -892,6 +912,9 @@ CTNAME(SetupForCPUToScreenColorExpandFill)(ScrnInfoPtr pScrn, int fg,
     CHIPSACLPtr cAcl = CHIPSACLPTR(pScrn);
 
     DEBUG_P("SetupForCPUToScreenColorExpandFill");
+
+    BE_SWAPOFF(pScrn,cPtr);
+    
     ctBLTWAIT;
     cAcl->CommandFlags = 0;
     if (bg == -1) {
@@ -1707,8 +1730,10 @@ CTNAME(ReadPixmap)(ScrnInfoPtr pScrn, int x, int y, int w, int h,
 	ctSETPITCH(srcpitch, byteWidthDst);
 	ctSETHEIGHTWIDTHGO(h, bytesPerLine);
 
+	BE_SWAPOFF(pScrn,cPtr);
 	MoveDataToCPU((unsigned char *)cAcl->BltDataWindow,
 		 (unsigned char *)dst, dstwidth, 16384, h, dwords);
+	BE_SWAPON(pScrn,cPtr);
 
     } else {
 	unsigned int vert = h;
@@ -1718,8 +1743,10 @@ CTNAME(ReadPixmap)(ScrnInfoPtr pScrn, int x, int y, int w, int h,
 	ctSETPITCH(srcpitch << 1, byteWidthDst << 1);
 	ctSETHEIGHTWIDTHGO(h, bytesPerLine);
 
+	BE_SWAPOFF(pScrn,cPtr);
 	MoveDataToCPU((unsigned char *)cAcl->BltDataWindow,
 		 (unsigned char *)dst, dstwidth<<1, 16384, h, dwords);
+	BE_SWAPON(pScrn,cPtr);
 
 	h = vert  >> 1;
 	dst += dstwidth;
@@ -1733,8 +1760,10 @@ CTNAME(ReadPixmap)(ScrnInfoPtr pScrn, int x, int y, int w, int h,
 	ctSETSRCADDR(srcaddr);
 	ctSETHEIGHTWIDTHGO(h, bytesPerLine);
 
+	BE_SWAPFF(pScrn,cPtr);
 	MoveDataToCPU((unsigned char *)cAcl->BltDataWindow,
 		 (unsigned char *)dst, dstwidth<<1, 16384, h, dwords);
+	BE_SWAPON(pScrn,cPtr);
     }
 
     cPtr->AccelInfoRec->NeedToSync = TRUE;
diff --git a/src/ct_cursor.c b/src/ct_cursor.c
index 55b56a3..f88a335 100644
--- a/src/ct_cursor.c
+++ b/src/ct_cursor.c
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_cursor.c,v 1.28 2003/07/17 08:19:34 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_cursor.c,v 1.24 2001/10/01 13:44:03 eich Exp $ */
 
 /*
  * Copyright 1994  The XFree86 Project
@@ -330,9 +330,14 @@ CHIPSLoadCursorImage(ScrnInfoPtr pScrn, unsigned char *src)
 	if (cPtr->Flags & ChipsLinearSupport) {
 #if X_BYTE_ORDER == X_BIG_ENDIAN
 	    /* On big endian machines we must flip our cursor image around. */
-    	    switch(cAcl->BytesPerPixel) {
+    	    switch(pScrn->bitsPerPixel >> 3) {
     	        case 4:
     	        case 3:
+#if 1
+		    memcpy((unsigned char *)cPtr->FbBase + cAcl->CursorAddress,
+			   src, cPtr->CursorInfoRec->MaxWidth * 
+			   cPtr->CursorInfoRec->MaxHeight / 4);
+#else
         	    for (y = 0; y < 64; y++) {
             	        P_SWAP32(d,s);
             	        d++; s++;
@@ -343,6 +348,7 @@ CHIPSLoadCursorImage(ScrnInfoPtr pScrn, unsigned char *src)
             	        P_SWAP32(d,s);
             	        d++; s++;
         	    }
+#endif
         	    break;
     	        case 2:
            	    for (y = 0; y < 64; y++) {
@@ -354,8 +360,6 @@ CHIPSLoadCursorImage(ScrnInfoPtr pScrn, unsigned char *src)
                         d++; s++;
                         P_SWAP16(d,s);
                         d++; s++;
-                        P_SWAP16(d,s);
-                        d++; s++;
                     }
                     break;
                 default:
diff --git a/src/ct_driver.c b/src/ct_driver.c
index 66ae8b6..720b250 100644
--- a/src/ct_driver.c
+++ b/src/ct_driver.c
@@ -1428,8 +1428,11 @@ chipsPreInitHiQV(ScrnInfoPtr pScrn, int flags)
 
     hwp = VGAHWPTR(pScrn);
     vgaHWGetIOBase(hwp);
+#if XF86_VERSION_CURRENT > XF86_VERSION_NUMERIC(4,1,0,0,0)
     cPtr->PIOBase = hwp->PIOOffset;
-
+#else
+     cPtr->PIOBase = 0 ; /* for old version the IO offset is global */
+#endif
     /*
      * Must allow ensure that storage for the 2nd set of vga registers is
      * allocated for dual channel cards
@@ -1529,10 +1532,12 @@ chipsPreInitHiQV(ScrnInfoPtr pScrn, int flags)
 	if (cPtr->pEnt->location.type == BUS_PCI) {
 	    /* Tack on 0x800000 to access the big-endian aperture? */
 #if X_BYTE_ORDER == X_BIG_ENDIAN
-	    cPtr->FbAddress =  (cPtr->PciInfo->memBase[0] & 0xff800000) + 0x800000L;
-#else
-	    cPtr->FbAddress =  cPtr->PciInfo->memBase[0] & 0xff800000;
+	    if (!BE_SWAP_APRETURE(pScrn,cPtr))
+		cPtr->FbAddress =  (cPtr->PciInfo->memBase[0] & 0xff800000) + 0x800000L;
+	    else
 #endif
+		cPtr->FbAddress =  cPtr->PciInfo->memBase[0] & 0xff800000;
+
 	    from = X_PROBED;
 	    if (xf86RegisterResources(cPtr->pEnt->index,NULL,ResNone))
 		cPtr->Flags &= ~ChipsLinearSupport;
@@ -1560,7 +1565,15 @@ chipsPreInitHiQV(ScrnInfoPtr pScrn, int flags)
 		   "Enabling linear addressing\n");
 	xf86DrvMsg(pScrn->scrnIndex, from,
 		   "base address is set at 0x%lX.\n", cPtr->FbAddress);
-	cPtr->IOAddress = cPtr->FbAddress + 0x400000L;
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+	if (BE_SWAP_APRETURE(pScrn,cPtr))
+	    cPtr->IOAddress = cPtr->FbAddress - 0x400000L;
+	else
+#endif
+	    cPtr->IOAddress = cPtr->FbAddress + 0x400000L;
+ 	xf86DrvMsg(pScrn->scrnIndex, X_DEFAULT,
+ 		   "IOAddress is set at 0x%lX.\n",cPtr->IOAddress);
+	
     } else
 	xf86DrvMsg(pScrn->scrnIndex, from,
 		   "Disabling linear addressing\n");
@@ -1835,6 +1848,13 @@ chipsPreInitHiQV(ScrnInfoPtr pScrn, int flags)
 	}
     }
 
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+    if (cPtr->pEnt->chipset == CHIPS_CT69030 && (cPtr->readXR(cPtr, 0x71) & 0x2))
+	cPtr->dualEndianAp = TRUE;
+    else
+	cPtr->dualEndianAp = FALSE;
+#endif
+
     if ((cPtr->Flags & ChipsDualChannelSupport) &&
 		(xf86IsEntityShared(pScrn->entityList[0]))) {
        /* 
@@ -4023,6 +4043,21 @@ CHIPSScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
     if (!ret)
 	return FALSE;
 
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+ 	/* TODO : find a better way to do this */
+ 	if (pScrn->depth == 24) {
+ 		int dummy ;
+ 		  /* Fixup RGB ordering in 24 BPP */
+ 			dummy = pScrn->offset.red ;
+ 			pScrn->offset.red = pScrn->offset.blue;
+ 			pScrn->offset.blue = dummy ;
+ 
+ 			dummy = pScrn->mask.red ;
+ 			pScrn->mask.red = pScrn->mask.blue;
+ 			pScrn->mask.blue = dummy ;
+ 	}
+#endif
+
     if (pScrn->depth > 8) {
         /* Fixup RGB ordering */
         visual = pScreen->visuals + pScreen->numVisuals;
@@ -5468,6 +5503,14 @@ chipsModeInitHiQV(ScrnInfoPtr pScrn, DisplayModePtr mode)
     if (!(cPtr->Flags & ChipsLinearSupport) || (pScrn->bitsPerPixel < 8))
 	ChipsNew->XR[0x0A] |= 0x1;
 
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+    ChipsNew->XR[0x0A] &= 0xCF;
+    if (pScrn->bitsPerPixel == 16) {
+	ChipsNew->XR[0x0A] &= 0xCF;
+	if  (cPtr->dualEndianAp)
+	    ChipsNew->XR[0x0A] |= 0x10;
+    }
+#endif
     ChipsNew->XR[0x09] |= 0x1;	       /* Enable extended CRT registers */
     ChipsNew->XR[0x0E] = 0;           /* Single map */
     ChipsNew->XR[0x40] |= 0x2;	       /* Don't wrap at 256kb */
@@ -7003,7 +7046,7 @@ chipsMapMem(ScrnInfoPtr pScrn)
     if (cPtr->Flags & ChipsLinearSupport) {
 	if (cPtr->UseMMIO) {
 	    if (IS_HiQV(cPtr)) {
-		if (cPtr->Bus == ChipsPCI)
+		if (cPtr->pEnt->location.type == BUS_PCI)
 		    cPtr->MMIOBase = xf86MapPciMem(pScrn->scrnIndex,
 			   VIDMEM_MMIO_32BIT,cPtr->PciTag, cPtr->IOAddress,
 			   0x20000L);
@@ -7011,7 +7054,7 @@ chipsMapMem(ScrnInfoPtr pScrn)
 		    cPtr->MMIOBase = xf86MapVidMem(pScrn->scrnIndex,
 			   VIDMEM_MMIO_32BIT, cPtr->IOAddress, 0x20000L);
 	    } else {
-		if (cPtr->Bus == ChipsPCI)
+		if (cPtr->pEnt->location.type == BUS_PCI)
 		    cPtr->MMIOBase = xf86MapPciMem(pScrn->scrnIndex,
 			  VIDMEM_MMIO_32BIT, cPtr->PciTag, cPtr->IOAddress,
 			  0x10000L);
@@ -7040,7 +7083,7 @@ chipsMapMem(ScrnInfoPtr pScrn)
 	    }
 	  }
 
-	  if (cPtr->Bus == ChipsPCI)
+	  if (cPtr->pEnt->location.type == BUS_PCI)
 	      cPtr->FbBase = xf86MapPciMem(pScrn->scrnIndex,VIDMEM_FRAMEBUFFER,
  			          cPtr->PciTag, Addr, Map);
 
diff --git a/src/ct_driver.h b/src/ct_driver.h
index 831ac9b..6c43617 100644
--- a/src/ct_driver.h
+++ b/src/ct_driver.h
@@ -22,7 +22,7 @@
  * PERFORMANCE OF THIS SOFTWARE.
  */
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_driver.h,v 1.34 2002/01/25 21:56:00 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_driver.h,v 1.33 2001/10/01 13:44:04 eich Exp $ */
 
 
 #ifndef _CT_DRIVER_H_
@@ -108,6 +108,7 @@ typedef struct {
 #define ChipsVideoSupport	0x00000100
 #define ChipsDualChannelSupport	0x00000200
 #define ChipsDualRefresh	0x00000400
+#define Chips64BitMemory	0x00000800
 
 /* Options flags for the C&T chipsets */
 #define ChipsHWCursor		0x00001000
@@ -273,7 +274,11 @@ typedef struct _CHIPSRec {
     PCITAG		PciTag;
     int			Chipset;
     EntityInfoPtr       pEnt;
-    IOADDRESS		PIOBase;
+#if XF86_VERSION_CURRENT > XF86_VERSION_NUMERIC(4,1,0,0,0)
+      IOADDRESS		PIOBase;
+#else
+    int			PIOBase; /* unused variable : here for compatibility reason with newer version */
+#endif
     CARD32		IOAddress;
     unsigned long	FbAddress;
     unsigned int	IOBase;
@@ -361,6 +366,7 @@ typedef struct _CHIPSRec {
     chipsWriteIOSSPtr	writeIOSS;
     Bool cursorDelay;
     unsigned int viewportMask;
+    Bool dualEndianAp;
 } CHIPSRec;
 
 typedef struct _CHIPSi2c {
@@ -430,6 +436,10 @@ void     chipsRefreshArea24(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
 void     chipsRefreshArea32(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
 void     chipsPointerMoved(int index, int x, int y);
 
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+# define BE_SWAP_APRETURE(pScrn,cPtr) \
+           ((pScrn->bitsPerPixel == 16) && cPtr->dualEndianAp)
+#endif
 
 /*
  * Some macros for switching display channels. NOTE... It appears that we