From c2ee29d00266a9a80fb312042b14a56f8baf978d Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Fri, 13 Sep 2013 11:04:28 -0400 Subject: drm/radeon/dpm/rs780: fix force_performance state for same sclks MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit If the low and high sclks within a power state are the same, there no need to enable sclk scaling. Enabling sclk scaling can cause display stability issues on some boards. Signed-off-by: Alex Deucher Reviewed-by: Christian König --- drivers/gpu/drm/radeon/rs780_dpm.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'drivers/gpu/drm/radeon') diff --git a/drivers/gpu/drm/radeon/rs780_dpm.c b/drivers/gpu/drm/radeon/rs780_dpm.c index eb336bf5a54e..6af8505cf4d2 100644 --- a/drivers/gpu/drm/radeon/rs780_dpm.c +++ b/drivers/gpu/drm/radeon/rs780_dpm.c @@ -1043,8 +1043,10 @@ int rs780_dpm_force_performance_level(struct radeon_device *rdev, if (pi->voltage_control) rs780_force_voltage(rdev, pi->max_voltage); - WREG32_P(FVTHROT_FBDIV_REG1, 0, ~FORCE_FEEDBACK_DIV); - rs780_clk_scaling_enable(rdev, true); + if (ps->sclk_high != ps->sclk_low) { + WREG32_P(FVTHROT_FBDIV_REG1, 0, ~FORCE_FEEDBACK_DIV); + rs780_clk_scaling_enable(rdev, true); + } if (pi->voltage_control) { rs780_voltage_scaling_enable(rdev, true); -- cgit v1.2.3