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2009-01-12target-mips: get rid of tests on env->user_mode_onlyaurel323-275/+274
Replace runtime checks on env->user_mode_only by compile time checks on CONFIG_USER_ONLY. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-01-04Update FSF address in GPL/LGPL boilerplateaurel324-4/+4
The attached patch updates the FSF address in the GPL/LGPL boilerplate in most GPL/LGPLed files, and also in COPYING.LIB. Signed-off-by: Stuart Brady <stuart.brady@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2008-12-22Use the ARRAY_SIZE() macro where appropriate.malc1-2/+2
Change from v1: Avoid changing the existing coding style in certain files. Signed-off-by: Stuart Brady <stuart.brady@gmail.com>
2008-12-20A first attempt on supporting snapshots for the MIPS target.ths1-0/+291
Signed-off-by: Thiemo Seufer <ths@networkno.de>
2008-12-20Fix remaining compiler warnings for mips targets.ths4-22/+22
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
2008-12-13Remove unnecessary trailing newlinesblueswir11-2/+0
2008-12-07MIPS: remove a few warningsaurel321-4/+4
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2008-11-30Common cpu_loop_exit prototypeaurel321-1/+0
All archs use the same cpu_loop_exit, so move the prototype in a common header. i386 was carrying a __hidden attribute, but that was empty for this arch anyway. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2008-11-25Use sys-queue.h for break/watchpoint managment (Jan Kiszka)aliguori1-2/+2
This switches cpu_break/watchpoint_* to TAILQ wrappers, simplifying the code and also fixing a use after release issue in cpu_break/watchpoint_remove_all. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2008-11-18Refactor and enhance break/watchpoint API (Jan Kiszka)aliguori1-3/+4
This patch prepares the QEMU cpu_watchpoint/breakpoint API to allow the succeeding enhancements this series comes with. First of all, it overcomes MAX_BREAKPOINTS/MAX_WATCHPOINTS by switching to dynamically allocated data structures that are kept in linked lists. This also allows to return a stable reference to the related objects, required for later introduced x86 debug register support. Breakpoints and watchpoints are stored with their full information set and an additional flag field that makes them easily extensible for use beyond pure guest debugging. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2008-11-18Refactor translation block CPU state handling (Jan Kiszka)aliguori1-0/+8
This patch refactors the way the CPU state is handled that is associated with a TB. The basic motivation is to move more arch specific code out of generic files. Specifically the long #ifdef clutter in tb_find_fast() has to be overcome in order to avoid duplicating it for the gdb watchpoint fixes (patch "Restore pc on watchpoint hits"). Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2008-11-18Convert CPU_PC_FROM_TB to static inline (Jan Kiszka)aliguori1-5/+7
as macros should be avoided when possible. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2008-11-17TCG variable type checking.pbrook3-1225/+1212
Signed-off-by: Paul Brook <paul@codesourcery.com>
2008-11-15target-mips: avoid tcg internal error in mfc0/dmfc0aurel321-8/+11
Set t0 to 0 for unimplemented mfc0/dmfc0 instructions. This fixes a tcg internal error while booting mips linux. Noticed by Julia Longtin. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2008-11-11Revert commits 5685 to 5688 committed by mistakeaurel321-0/+4
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2008-11-11Don't stop translation for mtc0 compareaurel321-4/+0
2008-11-11target-mips: gen_compute_branch1()aurel321-81/+41
Optimize code generation in gen_compute_branch1(): - Directly use I32 variables instead of converting values from _tl to _i32 and back to _tl. - Write the result directly to bcond instead of passing by a local variable. - Temp variables are valid up to and *including* the brcond instruction. Use them instead of temp local variables. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2008-11-11target-mips: optimize movc*()aurel321-48/+33
Optimize code generation in gen_movc*(): - Temp variables are valid up to and *including* the brcond instruction. Use them instead of temp local variables. - Avoid using temporary variables to transfer values. - Access fpu_fcr31 directly in gen_movcf_ps(). Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2008-11-11target-mips: optimize gen_farith()aurel321-12/+12
Optimize code generation in gen_farith(): - Temp variables are valid up to and *including* the brcond instruction. Use them instead of temp local variables. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2008-11-11target-mips: optimize gen_muldiv()aurel321-115/+47
Optimize code generation in gen_muldiv(): - Don't do sign extension when the value is already guaranteed to be sign extended (otherwise, results are marked as UNPREDICTABLE). - Access the LO, HI registers directly instead of writting them through a temporary variable. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2008-11-11target-mips: optimize gen_arith()/gen_arith_imm()aurel321-46/+32
Optimize code generation in gen_arith()/gen_arith_imm(): - Don't do sign extension when the value is already guaranteed to be sign extended (otherwise, results are marked as UNPREDICTABLE). - When the value is sign extended, compare the value to 0 instead of testing bit 31/63. - Temp variables are valid up to and *including* the brcond instruction. Use them instead of temp local variables. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2008-11-11target-mips: convert bit shuffle ops to TCGaurel323-76/+56
Bit shuffle operations can be written with very few TCG instructions (between 5 and 8), so it is worth converting them to TCG. This code also move all bit shuffle generation code to a separate function in order to have a cleaner exception code path, that is it doesn't store back the TCG register to the target register after the exception, as the TCG register doesn't exist anymore. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2008-11-11target-mips: convert bitfield ops to TCGaurel323-46/+41
Bitfield operations can be written with very few TCG instructions (between 2 and 5), so it is worth converting them to TCG. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2008-11-11target-mips: optimize gen_op_addr_add() (2/2)aurel323-16/+13
Instead of dynamically generating different code depending on the UX flag, add a new flag in ctx->flags to generate different code. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2008-11-11target-mips: optimize gen_op_addr_add() (1/2)aurel321-10/+7
The user mode can be tested at translation time using ctx->hflags. This simplifies gen_op_addr_add(). Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2008-11-11target-mips: optimize gen_save_pc()aurel321-5/+1
We obviously don't need to use a temporary variable to write PC. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2008-11-11target-mips: fix mft* helpers/callaurel323-34/+34
This patch attempts to fix mft* helpers and the associated TCG calls. mft* helpers do not take a register in argument, however: - some helpers are called with an argument while they do not take one. - some helpers are declared with an argument they don't use. Acked-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2008-11-11target-mips: fix temporary variable freeing in op_ldst_##insn()aurel321-1/+1
Move tcg_temp_free() out of the conditional part to make sure the TCG temporary variable is freed in all cases. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Acked-by: Thiemo Seufer <ths@networkno.de>
2008-11-04target-mips: use the new rotr/rotri instructionsaurel321-43/+5
Acked-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2008-10-06Show size for unassigned accesses (Robert Reif)blueswir12-2/+2
2008-09-22Use concet TCG instructions in the MIPS target.ths1-24/+4
Signed-off-by: Thiemo Seufer <ths@networkno.de>
2008-09-21Fix Xcontext fill, by Here Poussineau.ths1-1/+1
2008-09-21Add concat_i32_i64 op.pbrook1-17/+6
2008-09-18Use TCG registers for most CPU register accesses.ths1-17/+52
Signed-off-by: Thiemo Seufer <ths@networkno.de>
2008-09-18Move the active FPU registers into env again, and use more TCG registersths6-314/+330
to access them. Signed-off-by: Thiemo Seufer <ths@networkno.de>
2008-09-14MIPS: Fix tlbwi/tlbwraurel321-3/+9
In CP0 Index register, bit 31 means 'Probe Failure', while lowest bits contain the TLB index. In tlbwi and tlbwr instructions, this Probe Failure bit must be ignored when reading the TLB index. Attached patch fixes it. (Hervé Poussineau)
2008-09-14MIPS: remove empty cpu_mips_irqctrl_init()aurel321-1/+0
cpu_mips_irqctrl_init() function in hw/mips_timer.c is empty. Attached patch removes it, and its callers. (Hervé Poussineau)
2008-09-14target-mips: fix warningaurel321-1/+1
Attached patch fixes a warning in cpu_mips_find_by_name(). 'name' is a string, so it should be declared as char*, not unsigned char*. (Hervé Poussineau)
2008-09-05TCG fixes for target-mipsaurel321-26/+27
This patch fixes TCG errors reported on the MIPS target when TCG_DEBUG is enabled. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Acked-by: Thiemo Seufer <ths@networkno.de>
2008-09-02Build fix for gcc-3.3.ths1-0/+4
2008-08-30Fix some warnings that would be generated by gcc -Wredundant-declsblueswir11-3/+0
2008-08-23MIPS: don't free TCG temporary variable twiceaurel321-2/+0
In gen_dmtc0 function, TCG temporary variable t0 is freed at the end of the function. Variable is freed again in the gen_dmtc0 caller. I removed the free in gen_dmtc0, to do like in gen_dmfc0, gen_mfc0, gen_mtc0. (Hervé Poussineau)
2008-08-01Delete unused variable.ths1-1/+0
2008-07-23Use plain standard inline.ths2-11/+11
2008-07-23Less hardcoding of TARGET_USER_ONLY.ths6-390/+287
2008-07-21A bunch of minor code improvements in the MIPS target.ths2-21/+10
2008-07-21Fix logging output for MIPS HI, LO registers, by Stefan Weil.ths1-1/+2
2008-07-20Fix compiler warning, by Stefan Weil.ths1-1/+1
2008-07-20Simplify conditional FP moves.ths1-10/+5
2008-07-18Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues.ths1-7/+5
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