From 7d197d2db5e99e4c8b20f6771ddc7303acaa1c89 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Thu, 11 Feb 2016 11:17:32 +0000 Subject: target-arm: Fix IL bit reported for Thumb VFP and Neon traps All Thumb Neon and VFP instructions are 32 bits, so the IL bit in the syndrome register should be set. Pass false to the syn_* function's is_16bit argument rather than s->thumb so we report the correct IL bit. Signed-off-by: Peter Maydell Reviewed-by: Sergey Fedorov Message-id: 1454683067-16001-4-git-send-email-peter.maydell@linaro.org --- target-arm/translate.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'target-arm') diff --git a/target-arm/translate.c b/target-arm/translate.c index 8e8ffee9c6..cf3dc33774 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -3077,7 +3077,7 @@ static int disas_vfp_insn(DisasContext *s, uint32_t insn) */ if (s->fp_excp_el) { gen_exception_insn(s, 4, EXCP_UDEF, - syn_fp_access_trap(1, 0xe, s->thumb), s->fp_excp_el); + syn_fp_access_trap(1, 0xe, false), s->fp_excp_el); return 0; } @@ -4399,7 +4399,7 @@ static int disas_neon_ls_insn(DisasContext *s, uint32_t insn) */ if (s->fp_excp_el) { gen_exception_insn(s, 4, EXCP_UDEF, - syn_fp_access_trap(1, 0xe, s->thumb), s->fp_excp_el); + syn_fp_access_trap(1, 0xe, false), s->fp_excp_el); return 0; } @@ -5137,7 +5137,7 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn) */ if (s->fp_excp_el) { gen_exception_insn(s, 4, EXCP_UDEF, - syn_fp_access_trap(1, 0xe, s->thumb), s->fp_excp_el); + syn_fp_access_trap(1, 0xe, false), s->fp_excp_el); return 0; } -- cgit v1.2.3