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2012-06-24tci: don't write zero for reloc in tci_out_labelScott Wood1-1/+1
If tci_out_label is called in the context of tcg_gen_code_search_pc, we could be overwriting an already patched relocation with zero -- and not repatch it because the set_label is past search_pc, causing a QEMU crash when it tries to branch to a zero label. Not writing anything to the relocation area seems to be in line with what other backends do from the couple I looked at (x86, ppc). Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-06-24TCG: Fix compile breakage in tcg_dump_opsAlexander Graf2-2/+2
Commit eeacee4d865 changed the syntax of tcg_dump_ops, but didn't convert all users (notably missing the ppc ones) to it. Fix them to the new syntax. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: malc <av1474@comtv.ru>
2012-06-21qemu-log: cleanupBlue Swirl3-45/+51
Don't use global variables directly but via accessor functions. Rename globals. Convert macros to functions, add GCC format attributes. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-05-27tcg/ppc: Handle _CALL_DARWIN being undefined on DarwinAndreas Färber1-6/+10
powerpc-apple-darwin9-gcc-4.2.1 (GCC) 4.2.1 (Apple Inc. build 5577) does not define _CALL_DARWIN, leading to unexpected behavior w.r.t. register clobbering and stack frame layout. Since _CALL_DARWIN is a reserved identifier, define a custom TCG_TARGET_CALL_DARWIN based on either _CALL_DARWIN or __APPLE__. Signed-off-by: Andreas F?rber <andreas.faerber@web.de> Signed-off-by: malc <av1474@comtv.ru>
2012-05-15tcg/ppc64: Fix CONFIG_TCG_PASS_AREG0Andreas Färber1-20/+12
In qemu_ld/st load the registers for the helper calls directly rather than rotating them around afterwards for AREG0. Also clobber the additional register. Signed-off-by: Andreas F?rber <afaerber@suse.de> Signed-off-by: malc <av1474@comtv.ru>
2012-05-15tcg/ppc64: Don't hardcode register numbers for qemu_ld/stAndreas Färber1-7/+9
Facilitates using r3 for prepended AREG0. Signed-off-by: Andreas F?rber <afaerber@suse.de> Signed-off-by: malc <av1474@comtv.ru>
2012-05-09tcg/ppc: Fix CONFIG_TCG_PASS_AREG0 modeAndreas Färber1-1/+32
Adjust the tcg_out_qemu_{ld,st}() slow paths to pass AREG0 in r3, based on patches by malc. Also adjust the registers clobbered, based on patch by Alex. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Alexander Graf <agraf@suse.de> [AF: Do not hardcode r3 for AREG0, requested by Alex] Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-05-09tcg/ppc: Clobber r5 for 64-bit qemu_ldAndreas Färber1-0/+3
This accounts for the additional addr_reg2 register. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Alexander Graf <agraf@suse.de> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-05-09tcg/ppc: Don't hardcode register numbersAndreas Färber1-12/+17
Also assure i64 alignment where necessary. Alignment code optimization suggested by malc. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Alexander Graf <agraf@suse.de> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-05-09tcg/ppc: Do not overwrite lower address word on Darwin and AIXAndreas Färber1-4/+0
For targets where TARGET_LONG_BITS != 32, i.e. 64-bit guests, addr_reg is moved to r4. For hosts without TCG_TARGET_CALL_ALIGN_ARGS either data_reg2 or data_reg or a masked version thereof would overwrite r4. Place it in r5 instead, matching TCG_TARGET_CALL_ALIGN_ARGS hosts. This fixes immediate crashes of 64-bit guests observed on Darwin/ppc but not on Darwin/ppc64. Signed-off-by: Andreas Färber <andreas.faerber@web.de> Acked-by: malc <av1474@comtv.ru> Acked-by: Alexander Graf <agraf@suse.de> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-05-03Bail out if CONFIG_TCG_PASS_AREG0 is definedmalc1-21/+1
Signed-off-by: malc <av1474@comtv.ru>
2012-05-03Restore consistent formattingmalc1-18/+18
Signed-off-by: malc <av1474@comtv.ru>
2012-04-15tcg/i386: Add support for w64 ABIStefan Weil1-11/+28
w64 uses the registers rcx, rdx, r8 and r9 for function arguments, so it needs a different declaration of tcg_target_call_iarg_regs. rax, rcx, rdx, r8, r9, r10 and r11 may be changed by function calls. rbx, rbp, rdi, rsi, r12, r13, r14 and r15 remain unchanged by function calls. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Stefan Weil <sw@weilnetz.de>
2012-04-15tcg/i386: Use GDB JIT debugging interface only for hosts with ELFStefan Weil1-1/+5
Not all i386 / x86_64 hosts use ELF. Ask the compiler whether ELF is used. On w64, gdb crashes when ELF_HOST_MACHINE is defined. Cc: Blue Swirl <blauwirbel@gmail.com> Acked-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Stefan Weil <sw@weilnetz.de>
2012-03-29qemu tcg: Remove one entry of INDEX_op_ld_i64 from ppc_op_defsLi Zhang1-1/+0
There two entries of INDEX_op_ld_i64 in the ppc_op_defs. That causes an assertion failure in tcg_add_target_add_op_defs() when --enable-debug is used on a ppc64 backend (that's ppc64 host, not target). Signed-off-by: Li Zhang <zhlcindy@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: malc <av1474@comtv.ru>
2012-03-24tcg-sparc: Add debug_frame support.Richard Henderson1-0/+63
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-24tcg-hppa: Add debug_frame support.Richard Henderson1-15/+88
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-24tcg: Allow ELF_HOST_FLAGS and ELF_OSABI overrides in gdb-jit.Richard Henderson1-0/+6
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-24tcg: Add debug_info to JIT ELF image.Richard Henderson1-75/+158
This allows us to actually supply a function name in softmmu builds; gdb doesn't pick up the minimal symbol table otherwise. Also add a bit of documentation and statically generate more of the ELF image. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-24tcg: Use the GDB JIT debugging interface.Richard Henderson3-9/+301
This allows us to generate unwind info for the dynamicly generated code in the code_gen_buffer. Only i386 is converted at this point. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-18tcg: fix sparc host for AREG0 free operationBlue Swirl1-0/+11
e141ab52d2ea5d0bc6ad3b1ad32841127ca04adc didn't handle the other memory access helper case, fix. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-18softmmu templates: optionally pass CPUState to memory access functionsBlue Swirl10-3/+430
Optionally, make memory access helpers take a parameter for CPUState instead of relying on global env. On most targets, perform simple moves to reorder registers. On i386, switch from regparm(3) calling convention to standard stack-based version. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-18i386: Remove REGPARMBlue Swirl4-77/+58
Use stack based calling convention (GCC default) for interfacing with generated code instead of register based convention (regparm(3)). Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-17w64: Fix data type of next_tb and tcg_qemu_tb_execStefan Weil2-2/+2
next_tb is the numeric value of a tcg target (= QEMU host) address. Using tcg_target_ulong instead of unsigned long shows this and makes the code portable for hosts with an unusual size of long (w64). The type cast '(long)(next_tb & ~3)' was not needed (casting unsigned long to long does not change the bits, and nor does casting long to pointer for most (= all non w64) hosts. It is removed here. Macro or function tcg_qemu_tb_exec is used to set next_tb. The function also returns next_tb. Therefore tcg_qemu_tb_exec must return a tcg_target_ulong. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-17Fix large memory chunks allocation with tcg_malloc.Kirill Batuzov2-6/+10
An attempt to allocate a large memory chunk after a small one resulted in circular links in list of pools. It caused the same memory being allocated twice for different arrays. Now pools for large memory chunks are kept in separate list and are freed during pool reset because current allocator can not reuse them. Signed-off-by: Kirill Batuzov <batuzovk@ispras.ru> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-14Rename CPUState -> CPUArchStateAndreas Färber11-40/+40
Scripted conversion: for file in *.[hc] hw/*.[hc] hw/kvm/*.[hc] linux-user/*.[hc] linux-user/m68k/*.[hc] bsd-user/*.[hc] darwin-user/*.[hc] tcg/*/*.[hc] target-*/cpu.h; do sed -i "s/CPUState/CPUArchState/g" $file done All occurrences of CPUArchState are expected to be replaced by QOM CPUState, once all targets are QOM'ified and common fields have been extracted. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-11tcg: Improve tcg_out_label and fix its usage for w64Stefan Weil4-14/+14
tcg_out_label is always called with a third argument of pointer type which was casted to tcg_target_long. These casts can be avoided by changing the prototype of tcg_out_label. There was also a cast to long. For most hosts with sizeof(long) == sizeof(tcg_target_long) == sizeof(void *) this did not matter, but for w64 it was wrong. This is fixed now. Cc: Blue Swirl <blauwirbel@gmail.com> Cc: Richard Henderson <rth@twiddle.net> Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-03w64: fix type casts when calling flush_icache_rangeStefan Weil1-4/+5
Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-03w64: Change data type of parameters for flush_icache_rangeStefan Weil6-6/+13
The TCG targets i386 and tci needed a change of the function prototype for w64. This change is currently not needed for the other TCG targets, but it can be applied to avoid code differences. Cc: Blue Swirl <blauwirbel@gmail.com> Cc: Andrzej Zaborowski <balrogg@gmail.com> Cc: Richard Henderson <rth@twiddle.net> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Alexander Graf <agraf@suse.de> Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-03w64: Fix data type of parameters for flush_icache_rangeStefan Weil2-2/+4
flush_icache_range takes two address parameters which must be large enough to address any address of the host. For hosts with sizeof(unsigned long) == sizeof(void *), this patch changes nothing. All currently supported hosts fall into this category. For w64 hosts, sizeof(unsigned long) is 4 while sizeof(void *) is 8, so the use of tcg_target_ulong is needed for i386 and tci (the tcg targets which work with w64). Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-03tcg: Rearrange definitions and include statementsStefan Weil1-3/+3
This change makes tcg_target_ulong available in tcg-target.h. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-02-23tcg: Remove unneeded include statementsStefan Weil1-12/+0
The standard include files are already included in qemu-common.h. malloc.h and alloca.h were needed for alloca() which was removed from TCG code some years ago when switching from dyngen to TCG (see commit 49516bc0d622112caac9df628caf19010fda8b67). Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2012-01-13tcg-arm: fix a typo in commentsAurelien Jarno1-1/+1
ARM still doesn't support 16GB buffers in 32-bit modes, replace the 16GB by 16MB in the comment. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2012-01-10tcg/arm: Use r6 as TCG_AREG0 to avoid clash with Thumb framepointerPeter Maydell1-1/+1
On ARM, in Thumb mode r7 is used for the framepointer; this meant that we would fail to compile in debug mode because we were using r7 for TCG_AREG0. Shift to r6 instead to avoid this clash. (Bug reported as LP:870990.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
2011-12-14tcg/arm: remove fixed map code buffer restrictionDr. David Alan Gilbert1-19/+12
On ARM, don't map the code buffer at a fixed location, and fix up the call/goto tcg routines to let it do long jumps. Mapping the code buffer at a fixed address could sometimes result in it being mapped over the top of the heap with pretty random results. Signed-off-by: Dr. David Alan Gilbert <david.gilbert@linaro.org> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
2011-12-14tcg: make tcg_const_ptr actually accept a pointer argumentPeter Maydell2-5/+5
Make tcg_const_ptr() include a cast so that you can pass it a pointer. This allows us to drop the casts we had in all the places that use this macro. Acked-by: Andreas Färber <andreas.faerber@web.de> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-12-09tcg: Remove redundant declarations of TCG_TARGET_REG_BITSStefan Weil1-5/+0
TCG_TARGET_REG_BITS is declared in tcg.h for all TCG targets. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-12-02fix spelling in tcg sub directoryDong Xu Wang2-2/+2
Signed-off-by: Dong Xu Wang <wdongxu@linux.vnet.ibm.com> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-11-28tci: Make flush_icache_range() inlineStefan Weil2-4/+4
This is standard for other tcg targets and improves tci, too. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2011-11-19tcg-sparc: Fix set-but-not used warnings.Richard Henderson1-4/+0
In both cases, val is computed, but then not used in the subsequent line, which then re-computes the quantity in a different type (int32_t vs unsigned long). Keep the computation type that's been working so far. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-11-19Merge branch 's390-1.0' of git://repo.or.cz/qemu/agrafBlue Swirl19-69/+73
* 's390-1.0' of git://repo.or.cz/qemu/agraf: s390x: initialize virtio dev region tcg: Use TCGReg for standard tcg-target entry points. tcg: Standardize on TCGReg as the enum for hard registers s390x: Add shutdown for TCG s390-virtio machine s390: Fix cpu shutdown for KVM s390: fix short kernel command lines s390: fix reset hypercall to reset the status s390x: implement SIGP restart and shutdown s390x: implement rrbe instruction properly s390x: update R and C bits in storage key s390x: make ipte 31-bit aware s390x: add ldeb instruction
2011-11-14tcg: Use TCGReg for standard tcg-target entry points.Richard Henderson10-52/+56
Including tcg_out_ld, tcg_out_st, tcg_out_mov, tcg_out_movi. Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2011-11-14tcg: Standardize on TCGReg as the enum for hard registersRichard Henderson9-17/+17
Most targets did not name the enum; tci used TCGRegister. Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2011-11-11tcg-ppc64: Fix compile errors for userspace only builds with gcc 4.6David Gibson1-6/+8
tcg/ppc64/tcg-target.c has a couple of places where variables are set unconditionally, but otherwise used only for softmmu builds, not userspace only builds. This causes compiler warnings (which are fatal by default) when compiling for a ppc64 host with gcc 4.6. This patch fixes the problem by moving the code which defines and sets the variables into the CONFIG_SOFTMMU guarded regions. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2011-11-02Merge branch 'tci' of git://qemu.weilnetz.de/qemuBlue Swirl6-6/+1207
* 'tci' of git://qemu.weilnetz.de/qemu: tcg: Add tcg interpreter to configure / make tcg: Add tci disassembler tcg: Add interpreter for bytecode tcg: Add bytecode generator for tcg interpreter tcg: Make ARRAY_SIZE(tcg_op_defs) globally available tcg: TCG targets may define tcg_qemu_tb_exec
2011-11-02tcg: Fix whitespace in tcg-op.h.Richard Henderson1-4/+4
Removing the only tabs in the file. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: malc <av1474@comtv.ru>
2011-11-02tcg: Fix regression in tcg_gen_deposit_i64.Richard Henderson1-0/+2
The error being caused by the failure to copy the other half of the input to the output after having narrowed the deposit operation. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: malc <av1474@comtv.ru>
2011-10-31tcg: Add bytecode generator for tcg interpreterStefan Weil3-0/+1196
Unlike other tcg target code generators, this one does not generate machine code for some cpu. It generates machine independent bytecode which is interpreted later. This allows running QEMU on any host. Interpreted bytecode is slower than direct execution of generated machine code. Signed-off-by: Stefan Weil <sw@weilnetz.de>
2011-10-31tcg: Make ARRAY_SIZE(tcg_op_defs) globally availableStefan Weil2-1/+3
tcg_op_defs was already a global array. The tci disassembler also needs ARRAY_SIZE(tcg_op_defs), so add a new global constant with this value. Signed-off-by: Stefan Weil <sw@weilnetz.de>
2011-10-31tcg: TCG targets may define tcg_qemu_tb_execStefan Weil2-5/+8
Targets may use a non standard definition of tcg_tb_exec by defining this macro in their tcg_target.h. This is used here by ppc. It will be used by the TCG interpreter, too. Cc: malc <av1474@comtv.ru> Signed-off-by: Stefan Weil <sw@weilnetz.de>
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