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2019-02-07slirp: Move g_spawn_async_with_fds_qemu compatibility to slirp/Samuel Thibault2-57/+62
Only slirp actually needs it, and will need it along in libslirp. Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
2019-02-07slirp: replace QEMU_BUILD_BUG_ON with G_STATIC_ASSERTSamuel Thibault3-9/+9
to remove another dependency on qemu. Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Stefano Garzarella <sgarzare@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
2019-02-07slirp: replace qemu qtailq with slirp own copyMarc-André Lureau2-2/+194
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
2019-02-07slirp: replace net/eth.h inclusion with own definesMarc-André Lureau3-2/+10
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
2019-02-07slirp: remove now useless QEMU headers inclusionsMarc-André Lureau8-14/+0
Some of those could have been squashed earlier, but it is easier to do it all here. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: samuel Thibault <samuel.thibault@ens-lyon.org>
2019-02-07slirp: remove qemu timer.h dependencyMarc-André Lureau4-3/+2
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
2019-02-07slirp: add slirp own version of pstrcpyMarc-André Lureau4-3/+22
Remove a dependency on qemu util. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
2019-02-07slirp: improve windows headers inclusionMarc-André Lureau1-11/+11
Our API usage requires Vista, set WIN32_LEAN_AND_MEAN to fix a number of issues (winsock2.h include order for ex, which is better to include first for legacy reasons). While at it, group redundants #ifndef _WIN32 blocks. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
2019-02-07slirp: do not include qemu headers in libslirp.h public API headerMarc-André Lureau1-1/+11
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
2019-02-07slirp: move QEMU state saving to a separate unitMarc-André Lureau5-361/+418
Make state saving optional: this will allow to build SLIRP without QEMU. (eventually, the vmstate helpers will be extracted, so an external project & process could save its state) Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
2019-02-07slirp: replace qemu_notify_event() with a callbackMarc-André Lureau7-6/+19
Introduce a SlirpCb callback to kick the main io-thread. Add an intermediary sodrop() function that will call SlirpCb.notify callback when sbdrop() returns true. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
2019-02-07slirp: add unregister_poll_fd() callbackMarc-André Lureau6-1/+14
Add a counter-part to register_poll_fd() for completeness. (so far, register_poll_fd() is called only on struct socket fd) Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
2019-02-07slirp: replace qemu_set_nonblock()Marc-André Lureau7-4/+30
Replace qemu_set_nonblock() with slirp_set_nonblock() qemu_set_nonblock() does some event registration with the main loop. Add a new callback register_poll_fd() for that reason. Always build the fd-register stub, to avoid #if WIN32. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
2019-02-07slirp: replace most qemu socket utilities with slirp own versionMarc-André Lureau8-36/+274
qemu_set_nonblock() is slightly more problematic and will be dealt with in a separate patch. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
2019-02-07slirp: replace QEMU_PACKED with SLIRP_PACKEDMarc-André Lureau4-10/+43
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
2019-02-07slirp: replace trace functions with DEBUG callsMarc-André Lureau5-12/+15
Remove a dependency on QEMU. Use the existing logging facilities. Set SLIRP_DEBUG=tftp to get tftp log. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
2019-02-07slirp: add callbacks for timerMarc-André Lureau4-13/+40
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
2019-02-07net/slirp: fix leaks on forwarding rule registration errorMarc-André Lureau1-0/+2
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
2019-02-07net/slirp: free forwarding rules on cleanupMarc-André Lureau1-7/+18
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
2019-02-07net/slirp: simplify checking for cmd: prefixMarc-André Lureau1-1/+1
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
2019-02-07slirp: generalize guestfwd with a callback based approachMarc-André Lureau7-32/+75
Instead of calling into QEMU chardev directly, and mixing it with slirp_add_exec() handling, add a new function slirp_add_guestfwd() which takes a write callback. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
2019-02-07slirp: Don't mark struct ipq or struct ipasfrag as packedPeter Maydell1-2/+5
There is no reason to mark the struct ipq and struct ipasfrag as packed: they are naturally aligned anyway, and are not representing any on-the-wire packet format. Indeed they vary in size depending on the size of pointers on the host system, because the 'struct qlink' members include 'void *' fields. Dropping the 'packed' annotation fixes clang -Waddress-of-packed-member warnings and probably lets the compiler generate better code too. The only thing we do care about in the layout of the struct is that the frag_link matches up with the ipf_link of the struct ipasfrag, as documented in the comment on that struct; assert at build time that this is the case. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
2019-02-07slirp: Avoid marking naturally packed structs as QEMU_PACKEDPeter Maydell2-7/+25
Various ipv6 structs in the slirp headers are marked QEMU_PACKED, but they are actually naturally aligned and will have no padding in them. Instead of marking them with the 'packed' attribute, assert at compile time that they are the size we expect. This allows us to take the address of fields within the structs without risking undefined behaviour, and suppresses clang -Waddress-of-packed-member warnings. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
2019-02-07slirp: Avoid unaligned 16bit memory accessSamuel Thibault1-1/+1
pkt parameter may be unaligned, so we must access it byte-wise. This fixes sparc64 host SIGBUS during pxe boot. Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2019-02-07Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190206' into stagingPeter Maydell3-4/+5
Queued accel/tcg patches # gpg: Signature made Wed 06 Feb 2019 03:42:52 GMT # gpg: using RSA key 64DF38E8AF7E215F # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth/tags/pull-tcg-20190206: accel/tcg: Consider cluster index in tb_lookup__cpu_state() tcg: add early clober modifier in atomic16_cmpxchg on aarch64 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-02-06accel/tcg: Consider cluster index in tb_lookup__cpu_state()Peter Maydell2-3/+4
In commit f7b78602fdc6c6e4be we added the CPU cluster number to the cflags field of the TB hash; this included adding it to the value kept in tb->cflags, since we pass that field directly into the hash calculation in some places. Unfortunately we forgot to check whether other parts of the code were doing comparisons against tb->cflags that would need to be updated. It turns out that there is exactly one such place: the tb_lookup__cpu_state() function checks whether the TB it has found in the tb_jmp_cache has a tb->cflags matching the cf_mask that is passed in. The tb->cflags has the cluster_index in it but the cf_mask does not. Hoist the "add cluster index to the cf_mask" code up from tb_htable_lookup() to tb_lookup__cpu_state() so it can be considered in the "did this TB match in the jmp cache" condition, as well as when we do the full hash lookup by physical PC, flags, etc. (tb_htable_lookup() is only called from tb_lookup__cpu_state(), so this change doesn't require any further knock-on changes.) Fixes: f7b78602fdc6c6e4be ("accel/tcg: Add cluster number to TCG TB hash") Tested-by: Cleber Rosa <crosa@redhat.com> Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reported-by: Howard Spoelstra <hsp.cat7@gmail.com> Reported-by: Cleber Rosa <crosa@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20190205151810.571-1-peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-02-06tcg: add early clober modifier in atomic16_cmpxchg on aarch64Catherine Ho1-1/+1
Without this patch, gcc might up the Input/Output registers and cause unpredictable error. Fixes: 1ec182c33379 ("target/arm: Convert to HAVE_CMPXCHG128") Signed-off-by: Catherine Ho <catherine.hecx@gmail.com> Message-Id: <1548838794-23757-1-git-send-email-catherine.hecx@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-02-05Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell155-1777/+3103
* cpu-exec fixes (Emilio, Laurent) * TCG bugfix in queue.h (Paolo) * high address load for linuxboot (Zhijian) * PVH support (Liam, Stefano) * misc i386 changes (Paolo, Robert, Doug) * configure tweak for openpty (Thomas) * elf2dmp port to Windows (Viktor) * initial improvements to Makefile infrastructure (Yang + GSoC 2013) # gpg: Signature made Tue 05 Feb 2019 17:34:42 GMT # gpg: using RSA key BFFBD25F78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: (76 commits) queue: fix QTAILQ_FOREACH_REVERSE_SAFE scsi-generic: Convert from DPRINTF() macro to trace events scsi-disk: Convert from DPRINTF() macro to trace events pc: Use hotplug_handler_(plug|unplug|unplug_request) i386: hvf: Fix smp boot hangs hw/vfio/Makefile.objs: Create new CONFIG_* variables for VFIO core and PCI hw/i2c/Makefile.objs: Create new CONFIG_* variables for EEPROM and ACPI controller hw/tricore/Makefile.objs: Create CONFIG_* for tricore hw/openrisc/Makefile.objs: Create CONFIG_* for openrisc hw/moxie/Makefile.objs: Conditionally build moxie hw/hppa/Makefile.objs: Create CONFIG_* for hppa hw/cris/Makefile.objs: Create CONFIG_* for cris hw/alpha/Makefile.objs: Create CONFIG_* for alpha hw/sparc64/Makefile.objs: Create CONFIG_* for sparc64 hw/riscv/Makefile.objs: Create CONFIG_* for riscv boards hw/nios2/Makefile.objs: Conditionally build nios2 hw/xtensa/Makefile.objs: Build xtensa_sim and xtensa_fpga conditionally hw/lm32/Makefile.objs: Conditionally build lm32 and milkmyst hw/sparc/Makefile.objs: CONFIG_* for sun4m and leon3 created hw/s390/Makefile.objs: Create new CONFIG_* variables for s390x boards and devices ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> # Conflicts: # qemu-deprecated.texi
2019-02-05Merge remote-tracking branch ↵Peter Maydell14-260/+622
'remotes/pmaydell/tags/pull-target-arm-20190205' into staging target-arm queue: * Implement Armv8.5-BTI extension for system emulation mode * Implement the PR_PAC_RESET_KEYS prctl() for linux-user mode's Armv8.3-PAuth support * Support TBI (top-byte-ignore) properly for linux-user mode * gdbstub: allow killing QEMU via vKill command * hw/arm/boot: Support DTB autoload for firmware-only boots * target/arm: Make FPSCR/FPCR trapped-exception bits RAZ/WI # gpg: Signature made Tue 05 Feb 2019 17:04:22 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20190205: (22 commits) target/arm: Make FPSCR/FPCR trapped-exception bits RAZ/WI hw/arm/boot: Support DTB autoload for firmware-only boots hw/arm/boot: Clarify why arm_setup_firmware_boot() doesn't set env->boot_info hw/arm/boot: Factor out "set up firmware boot" code hw/arm/boot: Factor out "direct kernel boot" code into its own function hw/arm/boot: Fix block comment style in arm_load_kernel() gdbstub: allow killing QEMU via vKill command target/arm: Enable TBI for user-only target/arm: Compute TB_FLAGS for TBI for user-only target/arm: Clean TBI for data operations in the translator target/arm: Add TBFLAG_A64_TBID, split out gen_top_byte_ignore tests/tcg/aarch64: Add pauth smoke test linux-user: Implement PR_PAC_RESET_KEYS target/arm: Enable BTI for -cpu max target/arm: Set btype for indirect branches target/arm: Reset btype for direct branches target/arm: Default handling of BTYPE during translation target/arm: Cache the GP bit for a page in MemTxAttrs exec: Add target-specific tlb bits to MemTxAttrs target/arm: Add BT and BTYPE to tb->flags ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-02-05Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20190205' into stagingPeter Maydell6-212/+330
Fixes and improvements in tcg and the zPCI code. # gpg: Signature made Tue 05 Feb 2019 16:36:09 GMT # gpg: using RSA key C3D0D66DC3624FF6A8C018CEDECF6B93C6F02FAF # gpg: issuer "cohuck@redhat.com" # gpg: Good signature from "Cornelia Huck <conny@cornelia-huck.de>" [unknown] # gpg: aka "Cornelia Huck <huckc@linux.vnet.ibm.com>" [full] # gpg: aka "Cornelia Huck <cornelia.huck@de.ibm.com>" [full] # gpg: aka "Cornelia Huck <cohuck@kernel.org>" [unknown] # gpg: aka "Cornelia Huck <cohuck@redhat.com>" [unknown] # Primary key fingerprint: C3D0 D66D C362 4FF6 A8C0 18CE DECF 6B93 C6F0 2FAF * remotes/cohuck/tags/s390x-20190205: s390x/pci: Unplug remaining requested devices on pcihost reset s390x/pci: Warn when adding PCI devices without the 'zpci' feature s390x/pci: Fix hotplugging of PCI bridges s390x/pci: Fix primary bus number for PCI bridges s390x/tcg: Don't model FP registers as globals s390x/pci: mark zpci devices as unmigratable s390x/pci: Drop release timer and replace it with a flag s390x/pci: Introduce unplug requests and split unplug handler s390x: remove direct reference to mem_path global from s390x code target/s390x: define TCG_GUEST_DEFAULT_MO for MTTCG Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-02-05target/arm: Make FPSCR/FPCR trapped-exception bits RAZ/WIPeter Maydell2-0/+12
The {IOE, DZE, OFE, UFE, IXE, IDE} bits in the FPSCR/FPCR are for enabling trapped IEEE floating point exceptions (where IEEE exception conditions cause a CPU exception rather than updating the FPSR status bits). QEMU doesn't implement this (and nor does the hardware we're modelling), but for implementations which don't implement trapped exception handling these control bits are supposed to be RAZ/WI. This allows guest code to test for whether the feature is present by trying to write to the bit and checking whether it sticks. QEMU is incorrectly making these bits read as written. Make them RAZ/WI as the architecture requires. In particular this was causing problems for the NetBSD automatic test suite. Reported-by: Martin Husemann <martin@netbsd.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190131130700.28392-1-peter.maydell@linaro.org
2019-02-05hw/arm/boot: Support DTB autoload for firmware-only bootsPeter Maydell1-1/+0
The arm_boot_info struct has a skip_dtb_autoload flag: if this is set to true by the board code then arm_load_kernel() will not load the DTB itself, but will leave this for the board code to do itself later. However, the check for this is done in a code path which is only executed for the case where we load a kernel image file. If we're taking the "boot via firmware" code path then the flag isn't honoured and the DTB is never loaded. We didn't notice this because the only real user of "boot via firmware" that cares about the DTB is the virt board (for UEFI boot), and that always wants skip_dtb_autoload anyway. But the SBSA reference board model we're planning to add will want the flag to behave correctly. Now we've refactored the arm_load_kernel() function, the fix is simple: drop the early 'return' so we fall into the same "load the DTB" code the boot-direct-kernel path uses. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-id: 20190131112240.8395-6-peter.maydell@linaro.org
2019-02-05hw/arm/boot: Clarify why arm_setup_firmware_boot() doesn't set env->boot_infoPeter Maydell1-1/+2
The code path for booting firmware doesn't set env->boot_info. At first sight this looks odd, so add a comment saying why we don't. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-id: 20190131112240.8395-5-peter.maydell@linaro.org
2019-02-05hw/arm/boot: Factor out "set up firmware boot" codePeter Maydell1-43/+49
Factor out the "boot via firmware" code path from arm_load_kernel() into its own function. This commit only moves code around; no semantic changes. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-id: 20190131112240.8395-4-peter.maydell@linaro.org
2019-02-05hw/arm/boot: Factor out "direct kernel boot" code into its own functionPeter Maydell1-70/+80
Factor out the "direct kernel boot" code path from arm_load_kernel() into its own function; this function is getting long enough that the code flow is a bit confusing. This commit only moves code around; no semantic changes. We leave the "load the dtb" code in arm_load_kernel() -- this is currently only used by the "direct kernel boot" path, but this is a bug which we will fix shortly. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-id: 20190131112240.8395-3-peter.maydell@linaro.org
2019-02-05hw/arm/boot: Fix block comment style in arm_load_kernel()Peter Maydell1-10/+20
Fix the block comment style in arm_load_kernel() to QEMU's current style preferences. This will allow us to do some refactoring of this function without checkpatch complaining about the code-motion patches. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-id: 20190131112240.8395-2-peter.maydell@linaro.org
2019-02-05gdbstub: allow killing QEMU via vKill commandMax Filippov1-0/+4
With multiprocess extensions gdb uses 'vKill' packet instead of 'k' to kill the inferior. Handle 'vKill' the same way 'k' was handled in the presence of single process. Fixes: 7cf48f6752e5 ("gdbstub: add multiprocess support to (f|s)ThreadInfo and ThreadExtraInfo") Cc: Luc Michel <luc.michel@greensocs.com> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Luc Michel <luc.michel@greensocs.com> Reviewed-by: KONRAD Frederic <frederic.konrad@adacore.com> Tested-by: KONRAD Frederic <frederic.konrad@adacore.com> Message-id: 20190130192403.13754-1-jcmvbkbc@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-02-05target/arm: Enable TBI for user-onlyRichard Henderson1-0/+6
This has been enabled in the linux kernel since v3.11 (commit d50240a5f6cea, 2013-09-03, "arm64: mm: permit use of tagged pointers at EL0"). Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190204132126.3255-5-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-02-05target/arm: Compute TB_FLAGS for TBI for user-onlyPeter Maydell2-42/+24
Enables, but does not turn on, TBI for CONFIG_USER_ONLY. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190204132126.3255-4-richard.henderson@linaro.org [PMM: adjusted #ifdeffery to placate clang, which otherwise complains about static functions that are unused in the CONFIG_USER_ONLY build] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-02-05target/arm: Clean TBI for data operations in the translatorRichard Henderson1-101/+116
This will allow TBI to be used in user-only mode, as well as avoid ping-ponging the softmmu TLB when TBI is in use. It will also enable other armv8 extensions. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190204132126.3255-3-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-02-05target/arm: Add TBFLAG_A64_TBID, split out gen_top_byte_ignoreRichard Henderson4-36/+39
Split out gen_top_byte_ignore in preparation of handling these data accesses; the new tbflags field is not yet honored. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190204132126.3255-2-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-02-05tests/tcg/aarch64: Add pauth smoke testRichard Henderson2-1/+28
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190201195404.30486-3-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-02-05linux-user: Implement PR_PAC_RESET_KEYSRichard Henderson2-0/+43
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190201195404.30486-2-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-02-05target/arm: Enable BTI for -cpu maxRichard Henderson1-0/+4
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190128223118.5255-11-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-02-05target/arm: Set btype for indirect branchesRichard Henderson1-1/+36
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190128223118.5255-9-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-02-05target/arm: Reset btype for direct branchesRichard Henderson1-0/+6
This is all of the non-exception cases of DISAS_NORETURN. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20190128223118.5255-8-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-02-05target/arm: Default handling of BTYPE during translationRichard Henderson3-2/+152
The branch target exception for guarded pages has high priority, and only 8 instructions are valid for that case. Perform this check before doing any other decode. Clear BTYPE after all insns that neither set BTYPE nor exit via exception (DISAS_NORETURN). Not yet handled are insns that exit via DISAS_NORETURN for some other reason, like direct branches. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190128223118.5255-7-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-02-05target/arm: Cache the GP bit for a page in MemTxAttrsRichard Henderson1-0/+6
Caching the bit means that we will not have to re-walk the page tables to look up the bit during translation. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20190128223118.5255-6-richard.henderson@linaro.org [PMM: no need to OR in guarded bit status] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-02-05exec: Add target-specific tlb bits to MemTxAttrsRichard Henderson1-0/+10
These bits can be used to cache target-specific data in cputlb read from the page tables. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20190128223118.5255-5-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-02-05target/arm: Add BT and BTYPE to tb->flagsRichard Henderson4-7/+23
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190128223118.5255-4-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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