diff options
author | Max Filippov <jcmvbkbc@gmail.com> | 2012-09-19 04:23:51 +0400 |
---|---|---|
committer | Blue Swirl <blauwirbel@gmail.com> | 2012-09-22 17:59:12 +0000 |
commit | 213ff4e6df0f74e93995a5d3d7429acb4ad3ee86 (patch) | |
tree | 24f94b22f625d5789547a9917a1a84881f55c992 /fpu | |
parent | 66176802960ad1f7c3d061d17b784088c2e28d59 (diff) |
softfloat: add NO_SIGNALING_NANS
Architectures that don't have signaling NaNs can define
NO_SIGNALING_NANS, it will make float*_is_quiet_nan return 1 for any NaN
and float*_is_signaling_nan always return 0.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'fpu')
-rw-r--r-- | fpu/softfloat-specialize.h | 67 | ||||
-rw-r--r-- | fpu/softfloat.h | 5 |
2 files changed, 72 insertions, 0 deletions
diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h index 490245004f..50b54b8791 100644 --- a/fpu/softfloat-specialize.h +++ b/fpu/softfloat-specialize.h @@ -41,6 +41,13 @@ these four paragraphs for those parts of this code that are retained. #define SNAN_BIT_IS_ONE 0 #endif +#if defined(TARGET_XTENSA) +/* Define for architectures which deviate from IEEE in not supporting + * signaling NaNs (so all NaNs are treated as quiet). + */ +#define NO_SIGNALING_NANS 1 +#endif + /*---------------------------------------------------------------------------- | The pattern for a default generated half-precision NaN. *----------------------------------------------------------------------------*/ @@ -127,6 +134,17 @@ typedef struct { uint64_t high, low; } commonNaNT; +#ifdef NO_SIGNALING_NANS +int float16_is_quiet_nan(float16 a_) +{ + return float16_is_any_nan(a_); +} + +int float16_is_signaling_nan(float16 a_) +{ + return 0; +} +#else /*---------------------------------------------------------------------------- | Returns 1 if the half-precision floating-point value `a' is a quiet | NaN; otherwise returns 0. @@ -156,6 +174,7 @@ int float16_is_signaling_nan(float16 a_) return (((a >> 9) & 0x3F) == 0x3E) && (a & 0x1FF); #endif } +#endif /*---------------------------------------------------------------------------- | Returns a quiet NaN if the half-precision floating point value `a' is a @@ -217,6 +236,17 @@ static float16 commonNaNToFloat16(commonNaNT a STATUS_PARAM) } } +#ifdef NO_SIGNALING_NANS +int float32_is_quiet_nan(float32 a_) +{ + return float32_is_any_nan(a_); +} + +int float32_is_signaling_nan(float32 a_) +{ + return 0; +} +#else /*---------------------------------------------------------------------------- | Returns 1 if the single-precision floating-point value `a' is a quiet | NaN; otherwise returns 0. @@ -246,6 +276,7 @@ int float32_is_signaling_nan( float32 a_ ) return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF ); #endif } +#endif /*---------------------------------------------------------------------------- | Returns a quiet NaN if the single-precision floating point value `a' is a @@ -586,6 +617,17 @@ static float32 propagateFloat32MulAddNaN(float32 a, float32 b, } } +#ifdef NO_SIGNALING_NANS +int float64_is_quiet_nan(float64 a_) +{ + return float64_is_any_nan(a_); +} + +int float64_is_signaling_nan(float64 a_) +{ + return 0; +} +#else /*---------------------------------------------------------------------------- | Returns 1 if the double-precision floating-point value `a' is a quiet | NaN; otherwise returns 0. @@ -619,6 +661,7 @@ int float64_is_signaling_nan( float64 a_ ) && ( a & LIT64( 0x0007FFFFFFFFFFFF ) ); #endif } +#endif /*---------------------------------------------------------------------------- | Returns a quiet NaN if the double-precision floating point value `a' is a @@ -773,6 +816,17 @@ static float64 propagateFloat64MulAddNaN(float64 a, float64 b, } } +#ifdef NO_SIGNALING_NANS +int floatx80_is_quiet_nan(floatx80 a_) +{ + return floatx80_is_any_nan(a_); +} + +int floatx80_is_signaling_nan(floatx80 a_) +{ + return 0; +} +#else /*---------------------------------------------------------------------------- | Returns 1 if the extended double-precision floating-point value `a' is a | quiet NaN; otherwise returns 0. This slightly differs from the same @@ -816,6 +870,7 @@ int floatx80_is_signaling_nan( floatx80 a ) && ( a.low == aLow ); #endif } +#endif /*---------------------------------------------------------------------------- | Returns a quiet NaN if the extended double-precision floating point value @@ -929,6 +984,17 @@ static floatx80 propagateFloatx80NaN( floatx80 a, floatx80 b STATUS_PARAM) } } +#ifdef NO_SIGNALING_NANS +int float128_is_quiet_nan(float128 a_) +{ + return float128_is_any_nan(a_); +} + +int float128_is_signaling_nan(float128 a_) +{ + return 0; +} +#else /*---------------------------------------------------------------------------- | Returns 1 if the quadruple-precision floating-point value `a' is a quiet | NaN; otherwise returns 0. @@ -964,6 +1030,7 @@ int float128_is_signaling_nan( float128 a ) && ( a.low || ( a.high & LIT64( 0x00007FFFFFFFFFFF ) ) ); #endif } +#endif /*---------------------------------------------------------------------------- | Returns a quiet NaN if the quadruple-precision floating point value `a' is diff --git a/fpu/softfloat.h b/fpu/softfloat.h index 2860ca0175..d8999b311a 100644 --- a/fpu/softfloat.h +++ b/fpu/softfloat.h @@ -251,6 +251,11 @@ int float16_is_quiet_nan( float16 ); int float16_is_signaling_nan( float16 ); float16 float16_maybe_silence_nan( float16 ); +INLINE int float16_is_any_nan(float16 a) +{ + return ((float16_val(a) & ~0x8000) > 0x7c00); +} + /*---------------------------------------------------------------------------- | The pattern for a default generated half-precision NaN. *----------------------------------------------------------------------------*/ |