diff options
author | pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-06-09 21:30:14 +0000 |
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committer | pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-06-09 21:30:14 +0000 |
commit | c9bac22c7d2405d5d243717f4a6b2e85a99e62fe (patch) | |
tree | fe0edb93692cf53421d8a861c370920fc28987d7 | |
parent | 06d92f40a120eca9ba431be5a190186cb8f3fab3 (diff) |
M68K watchpoint hacks.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2969 c046a42c-6fe2-441c-8c8c-71466251a162
-rw-r--r-- | target-m68k/translate.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/target-m68k/translate.c b/target-m68k/translate.c index ad8faadc0c..9fa46029a7 100644 --- a/target-m68k/translate.c +++ b/target-m68k/translate.c @@ -51,6 +51,7 @@ typedef struct DisasContext { uint32_t fpcr; struct TranslationBlock *tb; int singlestep_enabled; + int is_mem; } DisasContext; #define DISAS_JUMP_NEXT 4 @@ -129,6 +130,7 @@ typedef void (*disas_proc)(DisasContext *, uint16_t); static inline int gen_load(DisasContext * s, int opsize, int addr, int sign) { int tmp; + s->is_mem = 1; switch(opsize) { case OS_BYTE: tmp = gen_new_qreg(QMODE_I32); @@ -166,6 +168,7 @@ static inline int gen_load(DisasContext * s, int opsize, int addr, int sign) /* Generate a store. */ static inline void gen_store(DisasContext *s, int opsize, int addr, int val) { + s->is_mem = 1; switch(opsize) { case OS_BYTE: gen_st(s, 8, addr, val); @@ -2205,6 +2208,7 @@ DISAS_INSN(fpu) dest = QREG_F0; while (mask) { if (ext & mask) { + s->is_mem = 1; if (ext & (1 << 13)) { /* store */ gen_st(s, f64, addr, dest); @@ -3169,6 +3173,7 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb, dc->singlestep_enabled = env->singlestep_enabled; dc->fpcr = env->fpcr; dc->user = (env->sr & SR_S) == 0; + dc->is_mem = 0; nb_gen_labels = 0; lj = -1; do { @@ -3199,6 +3204,12 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb, last_cc_op = dc->cc_op; dc->insn_pc = dc->pc; disas_m68k_insn(env, dc); + + /* Terminate the TB on memory ops if watchpoints are present. */ + /* FIXME: This should be replacd by the deterministic execution + * IRQ raising bits. */ + if (dc->is_mem && env->nb_watchpoints) + break; } while (!dc->is_jmp && gen_opc_ptr < gen_opc_end && !env->singlestep_enabled && (pc_offset) < (TARGET_PAGE_SIZE - 32)); |