diff options
| author | Richard Henderson <rth@twiddle.net> | 2016-10-15 12:04:13 -0500 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2017-01-10 08:06:10 -0800 |
| commit | 6eebb7a438236fcf3fdadb013921ac597aaea911 (patch) | |
| tree | 6415edb144ae401564b28a23521ed1d839716805 | |
| parent | 04fc2f1c8fc030a11e08e81bb926392c0991282a (diff) | |
target-mips: Use the new extract op
Use extract for EXT and DEXT.
Reviewed-by: Yongbok Kim <yongbok.kim@imgtec.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
| -rw-r--r-- | target/mips/translate.c | 12 |
1 files changed, 5 insertions, 7 deletions
diff --git a/target/mips/translate.c b/target/mips/translate.c index 57b824ff2d..8deffa1c48 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -4488,11 +4488,12 @@ static void gen_bitops (DisasContext *ctx, uint32_t opc, int rt, if (lsb + msb > 31) { goto fail; } - tcg_gen_shri_tl(t0, t1, lsb); if (msb != 31) { - tcg_gen_andi_tl(t0, t0, (1U << (msb + 1)) - 1); + tcg_gen_extract_tl(t0, t1, lsb, msb + 1); } else { - tcg_gen_ext32s_tl(t0, t0); + /* The two checks together imply that lsb == 0, + so this is a simple sign-extension. */ + tcg_gen_ext32s_tl(t0, t1); } break; #if defined(TARGET_MIPS64) @@ -4507,10 +4508,7 @@ static void gen_bitops (DisasContext *ctx, uint32_t opc, int rt, if (lsb + msb > 63) { goto fail; } - tcg_gen_shri_tl(t0, t1, lsb); - if (msb != 63) { - tcg_gen_andi_tl(t0, t0, (1ULL << (msb + 1)) - 1); - } + tcg_gen_extract_tl(t0, t1, lsb, msb + 1); break; #endif case OPC_INS: |