diff options
Diffstat (limited to 'unichrome/via.h')
-rw-r--r-- | unichrome/via.h | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/unichrome/via.h b/unichrome/via.h index a983c29..6a20a68 100644 --- a/unichrome/via.h +++ b/unichrome/via.h @@ -41,12 +41,16 @@ /* Video status flag */ +#define VIDEO_HIDE 0x00000000 /*Video off*/ +#define VIDEO_SHOW 0x80000000 /*Video on*/ +#define VIDEO_ACTIVE 0x10000000 /*Video active*/ #define VIDEO_MPEG_INUSE 0x08000000 /*Video is used with MPEG */ #define VIDEO_HQV_INUSE 0x04000000 /*Video is used with HQV*/ #define VIDEO_CAPTURE0_INUSE 0x02000000 /*Video is used with CAPTURE 0*/ #define VIDEO_CAPTURE1_INUSE 0x00000000 /*Video is used with CAPTURE 1*/ #define VIDEO_1_INUSE 0x01000000 /*Video 1 is used with software flip*/ #define VIDEO_3_INUSE 0x00000000 /*Video 3 is used with software flip*/ +#define VIDEO_ON 0x00100000 #define MPEG_USE_V1 0x00010000 /*[16] : 1:MPEG use V1, 0:MPEG use V3*/ #define MPEG_USE_V3 0x00000000 /*[16] : 1:MPEG use V1, 0:MPEG use V3*/ #define MPEG_USE_HQV 0x00020000 /*[17] : 1:MPEG use HQV,0:MPEG not use HQV*/ @@ -199,7 +203,7 @@ #define RAM_TABLE_CONTROL 0x1C8 #define RAM_TABLE_READ 0x1CC -/* HQV Registers */ +/* HQV Registers*/ #define HQV_CONTROL 0x1D0 #define HQV_SRC_STARTADDR_Y 0x1D4 #define HQV_SRC_STARTADDR_U 0x1D8 @@ -259,6 +263,8 @@ #define V1_ON_SND_DISPLAY 0x80000000 #define V1_FIFO_32V1_32V2 0x00000000 #define V1_FIFO_48V1_32V2 0x00200000 +#define V1_PREFETCH_ON_3336 0x40000000 /*V1_PREFETCH_ON*/ +#define V1_GAMMA_ENABLE_3336 0x20000000 /*V1_Gamma_ENABLE*/ /* V12_QWORD_PER_LINE 0x234 */ #define V1_FETCH_COUNT 0x3ff00000 @@ -318,6 +324,11 @@ #define V1_FIFO_PRETHRESHOLD56 0x38000000 #define V1_FIFO_PRETHRESHOLD61 0x3D000000 +#define VIDEO_FIFO_DEPTH_VT3336 225 +#define VIDEO_FIFO_THRESHOLD_VT3336 200 +#define VIDEO_FIFO_PRETHRESHOLD_VT3336 250 +#define VIDEO_EXPIRE_NUM_VT3336 31 + /* ALPHA_V3_FIFO_CONTROL 0x278 * IA2 has 32 level FIFO for packet mode video format * 32 level FIFO for planar mode video YV12. with extension reg 230 bit 21 enable |