diff options
author | Christian König <christian.koenig@amd.com> | 2015-04-22 12:21:13 +0200 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2015-08-05 13:47:49 -0400 |
commit | 9c2afffedb773da27fd7506b31fc2164f329d3a8 (patch) | |
tree | 0b99a1763fdc9fc977d3575bc1dba584d955d7e0 /tests | |
parent | 9c3bec246e5f1f7d2fcb2bd7e7cc0deab4d8b20d (diff) |
amdgpu: cleanup public interface v2
Remove the mostly unused device parameter, for the few cases
where we really need it keep a copy in the context structure.
v2: rebased on internal branch
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tests')
-rw-r--r-- | tests/amdgpu/basic_tests.c | 33 | ||||
-rw-r--r-- | tests/amdgpu/cs_tests.c | 14 |
2 files changed, 22 insertions, 25 deletions
diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c index d04b1517..9f03c5a0 100644 --- a/tests/amdgpu/basic_tests.c +++ b/tests/amdgpu/basic_tests.c @@ -168,11 +168,11 @@ static void amdgpu_command_submission_gfx(void) r = amdgpu_cs_ctx_create(device_handle, &context_handle); CU_ASSERT_EQUAL(r, 0); - r = amdgpu_cs_alloc_ib(device_handle, context_handle, + r = amdgpu_cs_alloc_ib(context_handle, amdgpu_cs_ib_size_4K, &ib_result); CU_ASSERT_EQUAL(r, 0); - r = amdgpu_cs_alloc_ib(device_handle, context_handle, + r = amdgpu_cs_alloc_ib(context_handle, amdgpu_cs_ib_size_4K, &ib_result_ce); CU_ASSERT_EQUAL(r, 0); @@ -199,7 +199,7 @@ static void amdgpu_command_submission_gfx(void) ibs_request.number_of_ibs = 2; ibs_request.ibs = ib_info; - r = amdgpu_cs_submit(device_handle, context_handle, 0, + r = amdgpu_cs_submit(context_handle, 0, &ibs_request, 1, &fence_status.fence); CU_ASSERT_EQUAL(r, 0); @@ -207,10 +207,10 @@ static void amdgpu_command_submission_gfx(void) fence_status.timeout_ns = AMDGPU_TIMEOUT_INFINITE; fence_status.ip_type = AMDGPU_HW_IP_GFX; - r = amdgpu_cs_query_fence_status(device_handle, &fence_status, &expired); + r = amdgpu_cs_query_fence_status(&fence_status, &expired); CU_ASSERT_EQUAL(r, 0); - r = amdgpu_cs_ctx_free(device_handle, context_handle); + r = amdgpu_cs_ctx_free(context_handle); CU_ASSERT_EQUAL(r, 0); } @@ -230,7 +230,7 @@ static void amdgpu_command_submission_compute(void) for (instance = 0; instance < 8; instance++) { memset(&ib_result, 0, sizeof(struct amdgpu_cs_ib_alloc_result)); - r = amdgpu_cs_alloc_ib(device_handle, context_handle, + r = amdgpu_cs_alloc_ib(context_handle, amdgpu_cs_ib_size_4K, &ib_result); CU_ASSERT_EQUAL(r, 0); @@ -249,7 +249,7 @@ static void amdgpu_command_submission_compute(void) ibs_request.ibs = &ib_info; memset(&fence_status, 0, sizeof(struct amdgpu_cs_query_fence)); - r = amdgpu_cs_submit(device_handle, context_handle, 0, + r = amdgpu_cs_submit(context_handle, 0, &ibs_request, 1, &fence_status.fence); CU_ASSERT_EQUAL(r, 0); @@ -258,11 +258,11 @@ static void amdgpu_command_submission_compute(void) fence_status.ip_type = AMDGPU_HW_IP_COMPUTE; fence_status.ring = instance; - r = amdgpu_cs_query_fence_status(device_handle, &fence_status, &expired); + r = amdgpu_cs_query_fence_status(&fence_status, &expired); CU_ASSERT_EQUAL(r, 0); } - r = amdgpu_cs_ctx_free(device_handle, context_handle); + r = amdgpu_cs_ctx_free(context_handle); CU_ASSERT_EQUAL(r, 0); } @@ -291,7 +291,7 @@ static void amdgpu_sdma_test_exec_cs(amdgpu_context_handle context_handle, CU_ASSERT_TRUE(pm4_dw <= 1024); /* allocate IB */ - r = amdgpu_cs_alloc_ib(device_handle, context_handle, + r = amdgpu_cs_alloc_ib(context_handle, amdgpu_cs_ib_size_4K, &ib_result); CU_ASSERT_EQUAL(r, 0); @@ -313,7 +313,7 @@ static void amdgpu_sdma_test_exec_cs(amdgpu_context_handle context_handle, CU_ASSERT_NOT_EQUAL(ibs_request, NULL); /* submit CS */ - r = amdgpu_cs_submit(device_handle, context_handle, 0, + r = amdgpu_cs_submit(context_handle, 0, ibs_request, 1, &fence_status.fence); CU_ASSERT_EQUAL(r, 0); @@ -323,8 +323,7 @@ static void amdgpu_sdma_test_exec_cs(amdgpu_context_handle context_handle, fence_status.timeout_ns = AMDGPU_TIMEOUT_INFINITE; /* wait for IB accomplished */ - r = amdgpu_cs_query_fence_status(device_handle, &fence_status, - &expired); + r = amdgpu_cs_query_fence_status(&fence_status, &expired); CU_ASSERT_EQUAL(r, 0); CU_ASSERT_EQUAL(expired, true); } @@ -408,7 +407,7 @@ static void amdgpu_command_submission_sdma_write_linear(void) free(pm4); /* end of test */ - r = amdgpu_cs_ctx_free(device_handle, context_handle); + r = amdgpu_cs_ctx_free(context_handle); CU_ASSERT_EQUAL(r, 0); } @@ -489,7 +488,7 @@ static void amdgpu_command_submission_sdma_const_fill(void) free(pm4); /* end of test */ - r = amdgpu_cs_ctx_free(device_handle, context_handle); + r = amdgpu_cs_ctx_free(context_handle); CU_ASSERT_EQUAL(r, 0); } @@ -590,7 +589,7 @@ static void amdgpu_command_submission_sdma_copy_linear(void) free(pm4); /* end of test */ - r = amdgpu_cs_ctx_free(device_handle, context_handle); + r = amdgpu_cs_ctx_free(context_handle); CU_ASSERT_EQUAL(r, 0); } @@ -664,6 +663,6 @@ static void amdgpu_userptr_test(void) CU_ASSERT_EQUAL(r, 0); free(ptr); - r = amdgpu_cs_ctx_free(device_handle, context_handle); + r = amdgpu_cs_ctx_free(context_handle); CU_ASSERT_EQUAL(r, 0); } diff --git a/tests/amdgpu/cs_tests.c b/tests/amdgpu/cs_tests.c index ca63ae25..2bfdec37 100644 --- a/tests/amdgpu/cs_tests.c +++ b/tests/amdgpu/cs_tests.c @@ -73,8 +73,7 @@ int suite_cs_tests_init(void) if (r) return CUE_SINIT_FAILED; - r = amdgpu_cs_alloc_ib(device_handle, context_handle, - IB_SIZE, &ib_result); + r = amdgpu_cs_alloc_ib(context_handle, IB_SIZE, &ib_result); if (r) return CUE_SINIT_FAILED; @@ -88,11 +87,11 @@ int suite_cs_tests_clean(void) { int r; - r = amdgpu_cs_free_ib(device_handle, context_handle, ib_handle); + r = amdgpu_cs_free_ib(ib_handle); if (r) return CUE_SCLEAN_FAILED; - r = amdgpu_cs_ctx_free(device_handle, context_handle); + r = amdgpu_cs_ctx_free(context_handle); if (r) return CUE_SCLEAN_FAILED; @@ -121,13 +120,12 @@ static int submit(unsigned ndw, unsigned ip) ibs_request.number_of_ibs = 1; ibs_request.ibs = &ib_info; - r = amdgpu_cs_submit(device_handle, context_handle, 0, + r = amdgpu_cs_submit(context_handle, 0, &ibs_request, 1, &fence_status.fence); if (r) return r; - r = amdgpu_cs_alloc_ib(device_handle, context_handle, - IB_SIZE, &ib_result); + r = amdgpu_cs_alloc_ib(context_handle, IB_SIZE, &ib_result); if (r) return r; @@ -138,7 +136,7 @@ static int submit(unsigned ndw, unsigned ip) fence_status.timeout_ns = AMDGPU_TIMEOUT_INFINITE; fence_status.ip_type = ip; - r = amdgpu_cs_query_fence_status(device_handle, &fence_status, &expired); + r = amdgpu_cs_query_fence_status(&fence_status, &expired); if (r) return r; |