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authorTapani Pälli <tapani.palli@intel.com>2020-09-25 09:19:35 +0300
committerTapani Pälli <tapani.palli@intel.com>2020-09-30 13:37:48 +0300
commitbb7433c1c69b851903e28aecb26cc2615a87d1bd (patch)
tree5e5ddb6f81ecdd217637c84de83dfd1456d5bf96 /intel
parent77687f8d6ea321998b87f87433db1fea7518b8bf (diff)
intel: add INTEL_DG1_IDS to the pciids list
This enables drm_intel_bufmgr on DG1 and allows us to pass dmabuf import/export related tests with Piglit. Signed-off-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Diffstat (limited to 'intel')
-rw-r--r--intel/intel_chipset.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/intel/intel_chipset.c b/intel/intel_chipset.c
index c3ce8f51..439db3e5 100644
--- a/intel/intel_chipset.c
+++ b/intel/intel_chipset.c
@@ -36,6 +36,7 @@ static const struct pci_device {
} pciids[] = {
/* Keep ids sorted by gen; latest gen first */
INTEL_RKL_IDS(12),
+ INTEL_DG1_IDS(12),
INTEL_TGL_12_IDS(12),
INTEL_EHL_IDS(11),
INTEL_ICL_11_IDS(11),