merge trunk to ppc-1-0-0-branchppc-1-0-0-20000912

1 files changed, 157 insertions, 85 deletions

diff --git a/linux/mga_state.c b/linux/mga_state.c
index 723ccc53..43fec2ce 100644
--- a/linux/mga_state.c
+++ b/linux/mga_state.c
@@ -11,11 +11,11 @@
  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  * and/or sell copies of the Software, and to permit persons to whom the
  * Software is furnished to do so, subject to the following conditions:
- * 
+ *
  * The above copyright notice and this permission notice (including the next
  * paragraph) shall be included in all copies or substantial portions of the
  * Software.
- * 
+ *
  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
@@ -34,6 +34,22 @@
 #include "mga_drv.h"
 #include "drm.h"
 
+/* If you change the functions to set state, PLEASE
+ * change these values
+ */
+
+#define MGAEMITCLIP_SIZE	10
+#define MGAEMITCTX_SIZE		20
+#define MGAG200EMITTEX_SIZE 	20
+#define MGAG400EMITTEX0_SIZE	30
+#define MGAG400EMITTEX1_SIZE	25
+#define MGAG400EMITPIPE_SIZE	55
+#define MGAG200EMITPIPE_SIZE	15
+
+#define MAX_STATE_SIZE ((MGAEMITCLIP_SIZE * MGA_NR_SAREA_CLIPRECTS) + \
+			MGAEMITCTX_SIZE + MGAG400EMITTEX0_SIZE + \
+			MGAG400EMITTEX1_SIZE + MGAG400EMITPIPE_SIZE)
+
 static void mgaEmitClipRect(drm_mga_private_t * dev_priv,
 			    drm_clip_rect_t * box)
 {
@@ -60,8 +76,8 @@ static void mgaEmitClipRect(drm_mga_private_t * dev_priv,
 
 	PRIMOUTREG(MGAREG_DMAPAD, 0);
 	PRIMOUTREG(MGAREG_CXBNDRY, ((box->x2) << 16) | (box->x1));
-	PRIMOUTREG(MGAREG_YTOP, box->y1 * dev_priv->stride / 2);
-	PRIMOUTREG(MGAREG_YBOT, box->y2 * dev_priv->stride / 2);
+	PRIMOUTREG(MGAREG_YTOP, box->y1 * dev_priv->stride / dev_priv->cpp);
+	PRIMOUTREG(MGAREG_YBOT, box->y2 * dev_priv->stride / dev_priv->cpp);
 
 	PRIMADVANCE(dev_priv);
 }
@@ -73,7 +89,7 @@ static void mgaEmitContext(drm_mga_private_t * dev_priv)
 	PRIMLOCALS;
 	DRM_DEBUG("%s\n", __FUNCTION__);
 
-	/* This takes a max of 15 dwords */
+	/* This takes a max of 20 dwords */
 	PRIMGETPTR(dev_priv);
 
 	PRIMOUTREG(MGAREG_DSTORG, regs[MGA_CTXREG_DSTORG]);
@@ -91,6 +107,11 @@ static void mgaEmitContext(drm_mga_private_t * dev_priv)
 		PRIMOUTREG(MGAREG_TDUALSTAGE0, regs[MGA_CTXREG_TDUAL0]);
 		PRIMOUTREG(MGAREG_TDUALSTAGE1, regs[MGA_CTXREG_TDUAL1]);
 		PRIMOUTREG(MGAREG_FCOL, regs[MGA_CTXREG_FCOL]);
+
+		PRIMOUTREG(MGAREG_STENCIL, regs[MGA_CTXREG_STENCIL]);
+		PRIMOUTREG(MGAREG_STENCILCTL, regs[MGA_CTXREG_STENCILCTL]);
+		PRIMOUTREG(MGAREG_DMAPAD, 0);
+		PRIMOUTREG(MGAREG_DMAPAD, 0);
 	} else {
 		PRIMOUTREG(MGAREG_FCOL, regs[MGA_CTXREG_FCOL]);
 		PRIMOUTREG(MGAREG_DMAPAD, 0);
@@ -135,11 +156,13 @@ static void mgaG200EmitTex(drm_mga_private_t * dev_priv)
 	PRIMADVANCE(dev_priv);
 }
 
+#define TMC_dualtex_enable 		0x80
+
 static void mgaG400EmitTex0(drm_mga_private_t * dev_priv)
 {
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	unsigned int *regs = sarea_priv->TexState[0];
-	int multitex = sarea_priv->WarpPipe & MGA_T2;
+	int multitex = regs[MGA_TEXREG_CTL2] & TMC_dualtex_enable;
 	PRIMLOCALS;
 	DRM_DEBUG("%s\n", __FUNCTION__);
 
@@ -147,7 +170,9 @@ static void mgaG400EmitTex0(drm_mga_private_t * dev_priv)
 
 	/* This takes a max of 30 dwords */
 
-	PRIMOUTREG(MGAREG_TEXCTL2, regs[MGA_TEXREG_CTL2] | 0x00008000);
+	PRIMOUTREG(MGAREG_TEXCTL2, regs[MGA_TEXREG_CTL2] 
+  		   | 0x00008000 
+	   );
 	PRIMOUTREG(MGAREG_TEXCTL, regs[MGA_TEXREG_CTL]);
 	PRIMOUTREG(MGAREG_TEXFILTER, regs[MGA_TEXREG_FILTER]);
 	PRIMOUTREG(MGAREG_TEXBORDERCOL, regs[MGA_TEXREG_BORDERCOL]);
@@ -167,7 +192,7 @@ static void mgaG400EmitTex0(drm_mga_private_t * dev_priv)
 	PRIMOUTREG(0x2d00 + 61 * 4, 0);
 	PRIMOUTREG(MGAREG_DMAPAD, 0);
 
-	if (!multitex) {
+	if (!multitex || 1) {
 		PRIMOUTREG(0x2d00 + 52 * 4, 0x40);
 		PRIMOUTREG(0x2d00 + 60 * 4, 0x40);
 		PRIMOUTREG(MGAREG_DMAPAD, 0);
@@ -184,10 +209,10 @@ static void mgaG400EmitTex0(drm_mga_private_t * dev_priv)
 
 #define TMC_map1_enable 		0x80000000
 
-static void mgaG400EmitTex1(drm_mga_private_t * dev_priv)
+static void mgaG400EmitTex1(drm_mga_private_t * dev_priv, int source )
 {
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
-	unsigned int *regs = sarea_priv->TexState[1];
+	unsigned int *regs = sarea_priv->TexState[source];
 	PRIMLOCALS;
 	DRM_DEBUG("%s\n", __FUNCTION__);
 
@@ -195,8 +220,8 @@ static void mgaG400EmitTex1(drm_mga_private_t * dev_priv)
 
 	/* This takes 25 dwords */
 
-	PRIMOUTREG(MGAREG_TEXCTL2,
-		   regs[MGA_TEXREG_CTL2] | TMC_map1_enable | 0x00008000);
+	PRIMOUTREG(MGAREG_TEXCTL2, regs[MGA_TEXREG_CTL2] | TMC_map1_enable | 
+		   0x00008000);
 	PRIMOUTREG(MGAREG_TEXCTL, regs[MGA_TEXREG_CTL]);
 	PRIMOUTREG(MGAREG_TEXFILTER, regs[MGA_TEXREG_FILTER]);
 	PRIMOUTREG(MGAREG_TEXBORDERCOL, regs[MGA_TEXREG_BORDERCOL]);
@@ -224,12 +249,13 @@ static void mgaG400EmitTex1(drm_mga_private_t * dev_priv)
 	PRIMADVANCE(dev_priv);
 }
 
-#define EMIT_PIPE 50
 static void mgaG400EmitPipe(drm_mga_private_t * dev_priv)
 {
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	unsigned int pipe = sarea_priv->WarpPipe;
 	float fParam = 12800.0f;
+	int multitex = (sarea_priv->TexState[0][MGA_TEXREG_CTL2] &
+			TMC_dualtex_enable);
 	PRIMLOCALS;
 	DRM_DEBUG("%s\n", __FUNCTION__);
 
@@ -237,14 +263,36 @@ static void mgaG400EmitPipe(drm_mga_private_t * dev_priv)
 
 	/* This takes 50 dwords */
 
-	/* Establish vertex size.  
+	/* Establish vertex size.
 	 */
 	PRIMOUTREG(MGAREG_WIADDR2, WIA_wmode_suspend);
 	PRIMOUTREG(MGAREG_DMAPAD, 0);
 	PRIMOUTREG(MGAREG_DMAPAD, 0);
 	PRIMOUTREG(MGAREG_DMAPAD, 0);
 
-	if (pipe & MGA_T2) {
+	if (sarea_priv->vertexsize == 10) {
+		PRIMOUTREG(MGAREG_YDST, 0);
+		PRIMOUTREG(MGAREG_FXLEFT, 0);
+		PRIMOUTREG(MGAREG_FXRIGHT, 1);
+		PRIMOUTREG(MGAREG_DWGCTL, MGA_FLUSH_CMD);
+
+		PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 1);
+		PRIMOUTREG(MGAREG_DMAPAD, 0);
+		PRIMOUTREG(MGAREG_DWGSYNC, 0x7000);
+		PRIMOUTREG(MGAREG_DMAPAD, 0);
+
+		if (multitex) {
+			PRIMOUTREG(MGAREG_TEXCTL2, 0 | 0x00008000);
+			PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0);
+			PRIMOUTREG(MGAREG_TEXCTL2, 0x80 | 0x00008000);
+			PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0);
+		} else {
+			PRIMOUTREG(MGAREG_TEXCTL2, 0 | 0x00008000);
+			PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0);
+			PRIMOUTREG(MGAREG_TEXCTL2, 0 | 0x00008000);
+			PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0);
+		}
+
 		PRIMOUTREG(MGAREG_WVRTXSZ, 0x00001e09);
 		PRIMOUTREG(MGAREG_DMAPAD, 0);
 		PRIMOUTREG(MGAREG_DMAPAD, 0);
@@ -255,23 +303,21 @@ static void mgaG400EmitPipe(drm_mga_private_t * dev_priv)
 		PRIMOUTREG(MGAREG_WACCEPTSEQ, 0);
 		PRIMOUTREG(MGAREG_WACCEPTSEQ, 0x1e000000);
 	} else {
-		if (dev_priv->WarpPipe & MGA_T2) {
-			/* Flush the WARP pipe */
-			PRIMOUTREG(MGAREG_YDST, 0);
-			PRIMOUTREG(MGAREG_FXLEFT, 0);
-			PRIMOUTREG(MGAREG_FXRIGHT, 1);
-			PRIMOUTREG(MGAREG_DWGCTL, MGA_FLUSH_CMD);
-
-			PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 1);
-			PRIMOUTREG(MGAREG_DMAPAD, 0);
-			PRIMOUTREG(MGAREG_DWGSYNC, 0x7000);
-			PRIMOUTREG(MGAREG_DMAPAD, 0);
+		/* Flush the WARP pipe */
+		PRIMOUTREG(MGAREG_YDST, 0);
+		PRIMOUTREG(MGAREG_FXLEFT, 0);
+		PRIMOUTREG(MGAREG_FXRIGHT, 1);
+		PRIMOUTREG(MGAREG_DWGCTL, MGA_FLUSH_CMD);
 
-			PRIMOUTREG(MGAREG_TEXCTL2, 0 | 0x00008000);
-			PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0);
-			PRIMOUTREG(MGAREG_TEXCTL2, 0x80 | 0x00008000);
-			PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0);
-		}
+		PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 1);
+		PRIMOUTREG(MGAREG_DMAPAD, 0);
+		PRIMOUTREG(MGAREG_DWGSYNC, 0x7000);
+		PRIMOUTREG(MGAREG_DMAPAD, 0);
+
+		PRIMOUTREG(MGAREG_TEXCTL2, 0 | 0x00008000);
+		PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0);
+		PRIMOUTREG(MGAREG_TEXCTL2, 0 | 0x00008000);
+		PRIMOUTREG(MGAREG_LEN + MGAREG_MGA_EXEC, 0);
 
 		PRIMOUTREG(MGAREG_WVRTXSZ, 0x00001807);
 		PRIMOUTREG(MGAREG_DMAPAD, 0);
@@ -299,13 +345,16 @@ static void mgaG400EmitPipe(drm_mga_private_t * dev_priv)
 	PRIMOUTREG(0x2d00 + 52 * 4, 0x40);	/* Tex stage 1 : w */
 	PRIMOUTREG(0x2d00 + 60 * 4, 0x40);	/* Tex stage 1 : h */
 
-	/* Dma pading required due to hw bug */
-	PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
-	PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
-	PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
-	PRIMOUTREG(MGAREG_WIADDR2,
-		   (u32) (dev_priv->WarpIndex[pipe].
-			  phys_addr | WIA_wmode_start | WIA_wagp_agp));
+	if (dev_priv->WarpPipe != pipe || 1) {
+		/* Dma pading required due to hw bug */
+		PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
+		PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
+		PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff);
+		PRIMOUTREG(MGAREG_WIADDR2,
+			   (u32) (dev_priv->WarpIndex[pipe].phys_addr |
+				  WIA_wmode_start | WIA_wagp_agp));
+	}
+
 	PRIMADVANCE(dev_priv);
 }
 
@@ -348,11 +397,20 @@ static void mgaEmitState(drm_mga_private_t * dev_priv)
 	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	if (dev_priv->chipset == MGA_CARD_TYPE_G400) {
-		int multitex = sarea_priv->WarpPipe & MGA_T2;
+	        int multitex = (sarea_priv->TexState[0][MGA_TEXREG_CTL2] &
+				TMC_dualtex_enable);
 
-		if (sarea_priv->WarpPipe != dev_priv->WarpPipe) {
+  		dirty = ~0;
+
+		if (dirty & MGA_UPLOAD_PIPE
+/*  		    && (sarea_priv->WarpPipe != dev_priv->WarpPipe || */
+/*  		        sarea_priv->vertexsize != dev_priv->vertexsize) */
+		   )
+		{
 			mgaG400EmitPipe(dev_priv);
 			dev_priv->WarpPipe = sarea_priv->WarpPipe;
+			dev_priv->vertexsize = sarea_priv->vertexsize;
+			sarea_priv->dirty &= ~MGA_UPLOAD_PIPE;
 		}
 
 		if (dirty & MGA_UPLOAD_CTX) {
@@ -365,8 +423,11 @@ static void mgaEmitState(drm_mga_private_t * dev_priv)
 			sarea_priv->dirty &= ~MGA_UPLOAD_TEX0;
 		}
 
-		if ((dirty & MGA_UPLOAD_TEX1) && multitex) {
-			mgaG400EmitTex1(dev_priv);
+		if (dirty & MGA_UPLOAD_TEX1) {
+			if (multitex)
+				mgaG400EmitTex1(dev_priv, 1);
+			else
+				mgaG400EmitTex1(dev_priv, 0);
 			sarea_priv->dirty &= ~MGA_UPLOAD_TEX1;
 		}
 	} else {
@@ -492,7 +553,6 @@ static void mga_dma_dispatch_tex_blit(drm_device_t * dev,
 	y2 = length / 64;
 
 	PRIM_OVERFLOW(dev, dev_priv, 30);
-	PRIMGETPTR(dev_priv);
 
 	PRIMOUTREG(MGAREG_DSTORG, destOrg);
 	PRIMOUTREG(MGAREG_MACCESS, 0x00000000);
@@ -526,7 +586,6 @@ static void mga_dma_dispatch_vertex(drm_device_t * dev, drm_buf_t * buf)
 	int length = buf->used;
 	int use_agp = PDEA_pagpxfer_enable;
 	int i = 0;
-	int primary_needed;
 	PRIMLOCALS;
 	DRM_DEBUG("%s\n", __FUNCTION__);
 
@@ -539,13 +598,15 @@ static void mga_dma_dispatch_vertex(drm_device_t * dev, drm_buf_t * buf)
 
 	if (buf->used) {
 		/* WARNING: if you change any of the state functions verify
-		 * these numbers (Overestimating this doesn't hurt).  
+		 * these numbers (Overestimating this doesn't hurt).
 		 */
 		buf_priv->dispatched = 1;
-		primary_needed = (50 + 15 + 15 + 30 + 25 +
-				  10 + 15 * MGA_NR_SAREA_CLIPRECTS);
-		PRIM_OVERFLOW(dev, dev_priv, primary_needed);
+		PRIM_OVERFLOW(dev, dev_priv,
+			      (MAX_STATE_SIZE + (5 * MGA_NR_SAREA_CLIPRECTS)));
 		mgaEmitState(dev_priv);
+
+/*  		length = dev_priv->vertexsize * 3 * 4; */
+
 		do {
 			if (i < sarea_priv->nbox) {
 				DRM_DEBUG("idx %d Emit box %d/%d:"
@@ -592,7 +653,6 @@ static void mga_dma_dispatch_indices(drm_device_t * dev,
 	unsigned int address = (unsigned int) buf->bus_address;
 	int use_agp = PDEA_pagpxfer_enable;
 	int i = 0;
-	int primary_needed;
 	PRIMLOCALS;
 	DRM_DEBUG("%s\n", __FUNCTION__);
 
@@ -603,12 +663,11 @@ static void mga_dma_dispatch_indices(drm_device_t * dev,
 
 	if (start != end) {
 		/* WARNING: if you change any of the state functions verify
-		 * these numbers (Overestimating this doesn't hurt).  
+		 * these numbers (Overestimating this doesn't hurt).
 		 */
 		buf_priv->dispatched = 1;
-		primary_needed = (50 + 15 + 15 + 30 + 25 +
-				  10 + 15 * MGA_NR_SAREA_CLIPRECTS);
-		PRIM_OVERFLOW(dev, dev_priv, primary_needed);
+		PRIM_OVERFLOW(dev, dev_priv,
+			      (MAX_STATE_SIZE + (5 * MGA_NR_SAREA_CLIPRECTS)));
 		mgaEmitState(dev_priv);
 
 		do {
@@ -634,6 +693,7 @@ static void mga_dma_dispatch_indices(drm_device_t * dev,
 				    SETADD_mode_vertlist));
 			PRIMOUTREG(MGAREG_SETUPEND,
 				   ((address + end) | use_agp));
+/*  				   ((address + start + 12) | use_agp)); */
 			PRIMADVANCE(dev_priv);
 		} while (++i < sarea_priv->nbox);
 	}
@@ -648,7 +708,9 @@ static void mga_dma_dispatch_indices(drm_device_t * dev,
 
 static void mga_dma_dispatch_clear(drm_device_t * dev, int flags,
 				   unsigned int clear_color,
-				   unsigned int clear_zval)
+				   unsigned int clear_zval,
+				   unsigned int clear_colormask,
+				   unsigned int clear_depthmask)
 {
 	drm_mga_private_t *dev_priv = dev->dev_private;
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -657,7 +719,6 @@ static void mga_dma_dispatch_clear(drm_device_t * dev, int flags,
 	drm_clip_rect_t *pbox = sarea_priv->boxes;
 	unsigned int cmd;
 	int i;
-	int primary_needed;
 	PRIMLOCALS;
 	DRM_DEBUG("%s\n", __FUNCTION__);
 
@@ -666,11 +727,7 @@ static void mga_dma_dispatch_clear(drm_device_t * dev, int flags,
 	else
 		cmd = MGA_CLEAR_CMD | DC_atype_rstr;
 
-	primary_needed = nbox * 70;
-	if (primary_needed == 0)
-		primary_needed = 70;
-	PRIM_OVERFLOW(dev, dev_priv, primary_needed);
-	PRIMGETPTR(dev_priv);
+	PRIM_OVERFLOW(dev, dev_priv, 35 * MGA_NR_SAREA_CLIPRECTS);
 
 	for (i = 0; i < nbox; i++) {
 		unsigned int height = pbox[i].y2 - pbox[i].y1;
@@ -682,7 +739,7 @@ static void mga_dma_dispatch_clear(drm_device_t * dev, int flags,
 		if (flags & MGA_FRONT) {
 			DRM_DEBUG("clear front\n");
 			PRIMOUTREG(MGAREG_DMAPAD, 0);
-			PRIMOUTREG(MGAREG_DMAPAD, 0);
+			PRIMOUTREG(MGAREG_PLNWT, clear_colormask);
 			PRIMOUTREG(MGAREG_YDSTLEN,
 				   (pbox[i].y1 << 16) | height);
 			PRIMOUTREG(MGAREG_FXBNDRY,
@@ -697,7 +754,7 @@ static void mga_dma_dispatch_clear(drm_device_t * dev, int flags,
 		if (flags & MGA_BACK) {
 			DRM_DEBUG("clear back\n");
 			PRIMOUTREG(MGAREG_DMAPAD, 0);
-			PRIMOUTREG(MGAREG_DMAPAD, 0);
+			PRIMOUTREG(MGAREG_PLNWT, clear_colormask);
 			PRIMOUTREG(MGAREG_YDSTLEN,
 				   (pbox[i].y1 << 16) | height);
 			PRIMOUTREG(MGAREG_FXBNDRY,
@@ -712,7 +769,7 @@ static void mga_dma_dispatch_clear(drm_device_t * dev, int flags,
 		if (flags & MGA_DEPTH) {
 			DRM_DEBUG("clear depth\n");
 			PRIMOUTREG(MGAREG_DMAPAD, 0);
-			PRIMOUTREG(MGAREG_DMAPAD, 0);
+			PRIMOUTREG(MGAREG_PLNWT, clear_depthmask);
 			PRIMOUTREG(MGAREG_YDSTLEN,
 				   (pbox[i].y1 << 16) | height);
 			PRIMOUTREG(MGAREG_FXBNDRY,
@@ -741,14 +798,12 @@ static void mga_dma_dispatch_swap(drm_device_t * dev)
 	int nbox = sarea_priv->nbox;
 	drm_clip_rect_t *pbox = sarea_priv->boxes;
 	int i;
-	int primary_needed;
+	int pixel_stride = dev_priv->stride / dev_priv->cpp;
+
 	PRIMLOCALS;
 	DRM_DEBUG("%s\n", __FUNCTION__);
 
-	primary_needed = nbox * 5;
-	primary_needed += 65;
-	PRIM_OVERFLOW(dev, dev_priv, primary_needed);
-	PRIMGETPTR(dev_priv);
+	PRIM_OVERFLOW(dev, dev_priv, (MGA_NR_SAREA_CLIPRECTS * 5) + 20);
 
 	PRIMOUTREG(MGAREG_DMAPAD, 0);
 	PRIMOUTREG(MGAREG_DMAPAD, 0);
@@ -758,7 +813,7 @@ static void mga_dma_dispatch_swap(drm_device_t * dev)
 	PRIMOUTREG(MGAREG_DSTORG, dev_priv->frontOffset);
 	PRIMOUTREG(MGAREG_MACCESS, dev_priv->mAccess);
 	PRIMOUTREG(MGAREG_SRCORG, dev_priv->backOffset);
-	PRIMOUTREG(MGAREG_AR5, dev_priv->stride / 2);
+	PRIMOUTREG(MGAREG_AR5, pixel_stride);
 
 	PRIMOUTREG(MGAREG_DMAPAD, 0);
 	PRIMOUTREG(MGAREG_DMAPAD, 0);
@@ -767,7 +822,7 @@ static void mga_dma_dispatch_swap(drm_device_t * dev)
 
 	for (i = 0; i < nbox; i++) {
 		unsigned int h = pbox[i].y2 - pbox[i].y1;
-		unsigned int start = pbox[i].y1 * dev_priv->stride / 2;
+		unsigned int start = pbox[i].y1 * pixel_stride;
 
 		DRM_DEBUG("dispatch swap %d,%d-%d,%d!\n",
 			  pbox[i].x1, pbox[i].y1, pbox[i].x2, pbox[i].y2);
@@ -799,8 +854,8 @@ int mga_clear_bufs(struct inode *inode, struct file *filp,
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	drm_mga_clear_t clear;
 
-	copy_from_user_ret(&clear, (drm_mga_clear_t *) arg, sizeof(clear),
-			   -EFAULT);
+	if (copy_from_user(&clear, (drm_mga_clear_t *) arg, sizeof(clear)))
+		return -EFAULT;
 	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
@@ -815,9 +870,14 @@ int mga_clear_bufs(struct inode *inode, struct file *filp,
 	 */
 	dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CTX;
 	mga_dma_dispatch_clear(dev, clear.flags,
-			       clear.clear_color, clear.clear_depth);
+			       clear.clear_color,
+			       clear.clear_depth,
+			       clear.clear_color_mask,
+			       clear.clear_depth_mask);
 	PRIMUPDATE(dev_priv);
+#ifdef __i386__
 	mga_flush_write_combine();
+#endif
 	mga_dma_schedule(dev, 1);
 	return 0;
 }
@@ -847,7 +907,9 @@ int mga_swap_bufs(struct inode *inode, struct file *filp,
 	PRIMUPDATE(dev_priv);
 	set_bit(MGA_BUF_SWAP_PENDING,
 		&dev_priv->current_prim->buffer_status);
+#ifdef __i386__
 	mga_flush_write_combine();
+#endif
 	mga_dma_schedule(dev, 1);
 	return 0;
 }
@@ -868,8 +930,8 @@ int mga_iload(struct inode *inode, struct file *filp,
 	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	DRM_DEBUG("Starting Iload\n");
-	copy_from_user_ret(&iload, (drm_mga_iload_t *) arg, sizeof(iload),
-			   -EFAULT);
+	if (copy_from_user(&iload, (drm_mga_iload_t *) arg, sizeof(iload)))
+		return -EFAULT;
 
 	if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
 		DRM_ERROR("mga_iload called without lock held\n");
@@ -895,7 +957,9 @@ int mga_iload(struct inode *inode, struct file *filp,
 	AGEBUF(dev_priv, buf_priv);
 	buf_priv->discard = 1;
 	mga_freelist_put(dev, buf);
+#ifdef __i386__
 	mga_flush_write_combine();
+#endif
 	mga_dma_schedule(dev, 1);
 	return 0;
 }
@@ -913,8 +977,8 @@ int mga_vertex(struct inode *inode, struct file *filp,
 	drm_mga_vertex_t vertex;
 	DRM_DEBUG("%s\n", __FUNCTION__);
 
-	copy_from_user_ret(&vertex, (drm_mga_vertex_t *) arg,
-			   sizeof(vertex), -EFAULT);
+	if (copy_from_user(&vertex, (drm_mga_vertex_t *) arg, sizeof(vertex)))
+		return -EFAULT;
 
 	if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
 		DRM_ERROR("mga_vertex called without lock held\n");
@@ -943,7 +1007,9 @@ int mga_vertex(struct inode *inode, struct file *filp,
 	mga_dma_dispatch_vertex(dev, buf);
 
 	PRIMUPDATE(dev_priv);
+#ifdef __i386__
 	mga_flush_write_combine();
+#endif
 	mga_dma_schedule(dev, 1);
 	return 0;
 }
@@ -962,8 +1028,8 @@ int mga_indices(struct inode *inode, struct file *filp,
 	drm_mga_indices_t indices;
 	DRM_DEBUG("%s\n", __FUNCTION__);
 
-	copy_from_user_ret(&indices, (drm_mga_indices_t *) arg,
-			   sizeof(indices), -EFAULT);
+	if (copy_from_user(&indices, (drm_mga_indices_t *) arg, sizeof(indices)))
+		return -EFAULT;
 
 	if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
 		DRM_ERROR("mga_indices called without lock held\n");
@@ -990,7 +1056,9 @@ int mga_indices(struct inode *inode, struct file *filp,
 	mga_dma_dispatch_indices(dev, buf, indices.start, indices.end);
 
 	PRIMUPDATE(dev_priv);
+#ifdef __i386__
 	mga_flush_write_combine();
+#endif
 	mga_dma_schedule(dev, 1);
 	return 0;
 }
@@ -1008,10 +1076,12 @@ static int mga_dma_get_buffers(drm_device_t * dev, drm_dma_t * d)
 		if (!buf)
 			break;
 		buf->pid = current->pid;
-		copy_to_user_ret(&d->request_indices[i],
-				 &buf->idx, sizeof(buf->idx), -EFAULT);
-		copy_to_user_ret(&d->request_sizes[i],
-				 &buf->total, sizeof(buf->total), -EFAULT);
+		if (copy_to_user(&d->request_indices[i],
+				 &buf->idx, sizeof(buf->idx)))
+			return -EFAULT;
+		if (copy_to_user(&d->request_sizes[i],
+				 &buf->total, sizeof(buf->total)))
+			return -EFAULT;
 		++d->granted_count;
 	}
 	return 0;
@@ -1027,7 +1097,8 @@ int mga_dma(struct inode *inode, struct file *filp, unsigned int cmd,
 	drm_dma_t d;
 	DRM_DEBUG("%s\n", __FUNCTION__);
 
-	copy_from_user_ret(&d, (drm_dma_t *) arg, sizeof(d), -EFAULT);
+	if (copy_from_user(&d, (drm_dma_t *) arg, sizeof(d)))
+		return -EFAULT;
 	DRM_DEBUG("%d %d: %d send, %d req\n",
 		  current->pid, d.context, d.send_count, d.request_count);
 
@@ -1062,6 +1133,7 @@ int mga_dma(struct inode *inode, struct file *filp, unsigned int cmd,
 
 	DRM_DEBUG("%d returning, granted = %d\n",
 		  current->pid, d.granted_count);
-	copy_to_user_ret((drm_dma_t *) arg, &d, sizeof(d), -EFAULT);
+	if (copy_to_user((drm_dma_t *) arg, &d, sizeof(d)))
+		return -EFAULT;
 	return retcode;
 }