From cc97ab235f3fe32401ca198cebe6f42642e95770 Mon Sep 17 00:00:00 2001 From: Paul Burton Date: Wed, 7 Nov 2018 23:13:59 +0000 Subject: MIPS: Simplify FP context initialization MIPS has up until now had 3 different ways for a task's floating point context to be initialized: - If the task's first use of FP involves it gaining ownership of an FPU then _init_fpu() is used to initialize the FPU's registers such that they all contain ~0, and the FPU registers will be stored to struct thread_info later (eg. when context switching). - If the task first uses FP on a CPU without an associated FPU then fpu_emulator_init_fpu() initializes the task's floating point register state in struct thread_info such that all floating point register contain the bit pattern 0x7ff800007ff80000, different to the _init_fpu() behaviour. - If a task's floating point context is first accessed via ptrace then init_fp_ctx() initializes the floating point register state in struct thread_info to ~0, giving equivalent state to _init_fpu(). The _init_fpu() path has 2 separate implementations - one for r2k/r3k style systems & one for r4k style systems. The _init_fpu() path also requires that we be careful to clear & restore the value of the Config5.FRE bit on modern systems in order to avoid inadvertently triggering floating point exceptions. None of this code is in a performance critical hot path - it runs only the first time a task uses floating point. As such it doesn't seem to warrant the complications of maintaining the _init_fpu() path. Remove _init_fpu() & fpu_emulator_init_fpu(), instead using init_fp_ctx() consistently to initialize floating point register state in struct thread_info. Upon a task's first use of floating point this will typically mean that we initialize state in memory & then load it into FPU registers using _restore_fp() just as we would on a context switch. For other paths such as __compute_return_epc_for_insn() or mipsr2_decoder() this results in a significant simplification of the work to be done. Signed-off-by: Paul Burton Patchwork: https://patchwork.linux-mips.org/patch/21002/ Cc: linux-mips@linux-mips.org --- arch/mips/include/asm/fpu.h | 57 ++++++++++++++++-------------------- arch/mips/include/asm/fpu_emulator.h | 11 ------- 2 files changed, 25 insertions(+), 43 deletions(-) (limited to 'arch/mips/include/asm') diff --git a/arch/mips/include/asm/fpu.h b/arch/mips/include/asm/fpu.h index a2813fe381cf..84de64606ccf 100644 --- a/arch/mips/include/asm/fpu.h +++ b/arch/mips/include/asm/fpu.h @@ -33,7 +33,6 @@ struct sigcontext; struct sigcontext32; -extern void _init_fpu(unsigned int); extern void _save_fp(struct task_struct *); extern void _restore_fp(struct task_struct *); @@ -198,42 +197,36 @@ static inline void lose_fpu(int save) preempt_enable(); } -static inline int init_fpu(void) +/** + * init_fp_ctx() - Initialize task FP context + * @target: The task whose FP context should be initialized. + * + * Initializes the FP context of the target task to sane default values if that + * target task does not already have valid FP context. Once the context has + * been initialized, the task will be marked as having used FP & thus having + * valid FP context. + * + * Returns: true if context is initialized, else false. + */ +static inline bool init_fp_ctx(struct task_struct *target) { - unsigned int fcr31 = current->thread.fpu.fcr31; - int ret = 0; - - if (cpu_has_fpu) { - unsigned int config5; - - ret = __own_fpu(); - if (ret) - return ret; + /* If FP has been used then the target already has context */ + if (tsk_used_math(target)) + return false; - if (!cpu_has_fre) { - _init_fpu(fcr31); + /* Begin with data registers set to all 1s... */ + memset(&target->thread.fpu.fpr, ~0, sizeof(target->thread.fpu.fpr)); - return 0; - } - - /* - * Ensure FRE is clear whilst running _init_fpu, since - * single precision FP instructions are used. If FRE - * was set then we'll just end up initialising all 32 - * 64b registers. - */ - config5 = clear_c0_config5(MIPS_CONF5_FRE); - enable_fpu_hazard(); + /* FCSR has been preset by `mips_set_personality_nan'. */ - _init_fpu(fcr31); + /* + * Record that the target has "used" math, such that the context + * just initialised, and any modifications made by the caller, + * aren't discarded. + */ + set_stopped_child_used_math(target); - /* Restore FRE */ - write_c0_config5(config5); - enable_fpu_hazard(); - } else - fpu_emulator_init_fpu(); - - return ret; + return true; } static inline void save_fp(struct task_struct *tsk) diff --git a/arch/mips/include/asm/fpu_emulator.h b/arch/mips/include/asm/fpu_emulator.h index b36097d3cbf4..7e233055f7b4 100644 --- a/arch/mips/include/asm/fpu_emulator.h +++ b/arch/mips/include/asm/fpu_emulator.h @@ -188,17 +188,6 @@ int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn, int mm_isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn, unsigned long *contpc); -#define SIGNALLING_NAN 0x7ff800007ff80000LL - -static inline void fpu_emulator_init_fpu(void) -{ - struct task_struct *t = current; - int i; - - for (i = 0; i < 32; i++) - set_fpr64(&t->thread.fpu.fpr[i], 0, SIGNALLING_NAN); -} - /* * Mask the FCSR Cause bits according to the Enable bits, observing * that Unimplemented is always enabled. -- cgit v1.2.3