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AgeCommit message (Expand)AuthorFilesLines
35 hoursdrm/xe/hdcp: Update handling of xe_force_wake_get returnHimal Prasad Ghimiray1-2/+4
35 hoursdrm/xe/device: Update handling of xe_force_wake_get returnHimal Prasad Ghimiray1-11/+14
35 hoursdrm/xe: Modify xe_force_wake_put to handle _get returned maskHimal Prasad Ghimiray2-8/+24
35 hoursdrm/xe: Error handling in xe_force_wake_get()Himal Prasad Ghimiray3-13/+45
35 hoursdrm/xe/forcewake: Add a helper xe_force_wake_ref_has_domain()Himal Prasad Ghimiray1-0/+16
35 hoursdrm/xe/forcewake: Change awake_domain datatypeHimal Prasad Ghimiray1-1/+1
35 hoursdrm/xe: Add member initialized_domains to xe_force_wake()Himal Prasad Ghimiray2-13/+19
36 hoursdrm/rockchip: Add basic RK3588 HDMI output supportCristian Ciocaltea5-0/+437
36 hoursdrm/bridge: synopsys: Add DW HDMI QP TX Controller support libraryCristian Ciocaltea4-0/+1491
36 hoursdrm/xe: Add caller info to xe_gt_reset_asyncNirmoy Das1-1/+1
37 hoursdrm/i915/dp: Fix memory leak in parse_lfp_panel_dtd()Shuicheng Lin1-0/+1
39 hoursdrm/sched: Further optimise drm_sched_entity_push_jobTvrtko Ursulin2-17/+23
39 hoursdrm/sched: Re-group and rename the entity run-queue lockTvrtko Ursulin2-15/+15
39 hoursdrm/sched: Stop setting current entity in FIFO modeTvrtko Ursulin1-1/+0
39 hoursdrm/sched: Optimise drm_sched_entity_push_jobTvrtko Ursulin2-7/+12
41 hoursMerge tag 'drm-msm-fixes-2024-10-16' of https://gitlab.freedesktop.org/drm/ms...Dave Airlie8-59/+89
42 hoursdrm/ast: vga: Clear EDID if no display is connectedThomas Zimmermann1-0/+2
42 hoursdrm/ast: sil164: Clear EDID if no display is connectedThomas Zimmermann1-0/+2
42 hoursRevert "drm/mgag200: Add vblank support"Thomas Zimmermann11-178/+6
2 daysdrm/amdgpu/swsmu: default to fullscreen 3D profile for dGPUsAlex Deucher1-1/+5
2 daysdrm/xe: Enlarge the invalidation timeout from 150 to 500Shuicheng Lin1-1/+1
2 daysdrm/xe/xe3lpg: Extend Wa_18034896535 to Xe3_LPG.Shekhar Chauhan1-0/+5
2 daysdrm/i915/panelreplay: Panel replay workaround with VRRAnimesh Manna1-0/+16
2 daysdrm/i915/vrr: Split vrr-compute-config in two phasesAnimesh Manna3-4/+12
2 daysdrm/i915/vrr: Add helper to check if vrr possibleMitul Golani2-1/+7
2 daysdrm/i915/display: Don't allow tile4 framebuffer to do hflip on display20 or g...Juha-Pekka Heikkila3-0/+25
2 daysdrm/xe/bmg: improve cache flushing behaviourMatthew Auld2-4/+0
2 daysdrm/xe/xe_sync: initialise ufence.signalledMatthew Auld1-1/+1
2 daysdrm/xe/ufence: ufence can be signaled right after wait_wokenNirmoy Das1-3/+0
2 daysdrm/xe: Use bookkeep slots for external BO's in exec IOCTLMatthew Brost1-8/+4
2 daysdrm/xe/query: Increase timestamp widthLucas De Marchi1-1/+5
2 daysdrm/xe: Don't free job in TDRMatthew Brost1-2/+5
2 daysdrm/xe: Take job list lock in xe_sched_add_pending_jobMatthew Brost1-0/+2
2 daysdrm/xe: fix unbalanced rpm put() with declare_wedged()Matthew Auld1-2/+2
2 daysdrm/xe: fix unbalanced rpm put() with fence_fini()Matthew Auld3-23/+15
2 daysdrm/xe/xe2lpg: Extend Wa_15016589081 for xe2lpgAradhya Bhatia1-0/+4
3 daysdrm/i915/dp_mst: Don't require DSC hblank quirk for a non-DSC compatible modeImre Deak1-0/+3
3 daysdrm/i915/dp_mst: Handle error during DSC BW overhead/slice calculationImre Deak1-10/+27
3 daysdrm/panel: s6e3ha8: select CONFIG_DRM_DISPLAY_DSC_HELPERArnd Bergmann1-0/+1
3 daysdrm/panel: Add Samsung AMS581VF01 panel driverDanila Tikhonov3-0/+293
3 daysdrm/msm/a6xx+: Insert a fence wait before SMMU table updateRob Clark1-3/+13
3 daysdrm/msm/dpu: don't always program merge_3d blockJessica Zhang1-1/+1
3 daysdrm/msm/dpu: Don't always set merge_3d pending flushJessica Zhang2-2/+8
3 daysgpu: host1x: Set up device DMA parametersThierry Reding1-0/+1
3 daysdrm/amdgpu/swsmu: Only force workload setup on initAlex Deucher1-3/+3
3 daysdrm/radeon: Fix encoder->possible_clonesVille Syrjälä1-1/+1
3 daysdrm/amdgpu/smu13: always apply the powersave optimizationAlex Deucher1-12/+10
3 daysdrm/amdkfd: Accounting pdd vram_usage for svmPhilip Yang4-6/+32
3 daysdrm/amd/amdgpu: Fix double unlock in amdgpu_mes_add_ringSrinivasan Shanmugam1-2/+3
3 daysdrm/amdgpu/mes: fix issue of writing to the same log buffer from 2 MES pipesMichael Chen1-2/+2