summaryrefslogtreecommitdiff
AgeCommit message (Expand)AuthorFilesLines
2021-03-29powerpc/32: Return directly from power_save_ppc32_restore()Christophe Leroy3-13/+2
2021-03-29powerpc/32: Save remaining registers in exception prologChristophe Leroy3-23/+28
2021-03-29powerpc/32: Refactor saving of volatile registers in exception prologsChristophe Leroy3-27/+24
2021-03-29powerpc/32: Remove the xfer parameter in EXCEPTION() macroChristophe Leroy7-89/+81
2021-03-29powerpc/32: Dismantle EXC_XFER_STD/LITE/TEMPLATEChristophe Leroy7-106/+92
2021-03-29powerpc/32: Only restore non volatile registers when requiredChristophe Leroy6-16/+62
2021-03-29powerpc/32: Add a prepare_transfer_to_handler macro for exception prologsChristophe Leroy3-0/+11
2021-03-29powerpc/32: Save trap number on stack in exception prologChristophe Leroy6-54/+58
2021-03-29powerpc/32: Call bad_page_fault() from do_page_fault()Christophe Leroy7-26/+10
2021-03-29powerpc/32: Set regs parameter in r3 in transfer_to_handlerChristophe Leroy7-34/+5
2021-03-29powerpc/32: Don't save thread.regs on interrupt entryChristophe Leroy1-4/+1
2021-03-29powerpc/32: Replace ASM exception exit by C exception exit from ppc64Christophe Leroy2-319/+123
2021-03-29powerpc/32: Always save non volatile registers on exception entryChristophe Leroy4-19/+5
2021-03-29powerpc/32: Perform normal function call in exception entryChristophe Leroy3-15/+9
2021-03-29powerpc/32: Refactor booke critical registers savingChristophe Leroy2-33/+41
2021-03-29powerpc/32: Provide a name to exception prolog continuation in virtual modeChristophe Leroy4-27/+31
2021-03-29powerpc/32: Move exception prolog code into .text once MMU is back onChristophe Leroy4-34/+36
2021-03-29powerpc/32: Use START_EXCEPTION() as much as possibleChristophe Leroy3-47/+22
2021-03-29powerpc/32: Add vmap_stack_overflow label inside the macroChristophe Leroy3-3/+4
2021-03-29powerpc/32: Statically initialise first emergency contextChristophe Leroy2-6/+2
2021-03-29powerpc/32: Enable instruction translation at the same time as data translationChristophe Leroy4-28/+31
2021-03-29powerpc/32: Tag DAR in EXCEPTION_PROLOG_2 for the 8xxChristophe Leroy2-12/+12
2021-03-29powerpc/32: Always enable data translation in exception prologChristophe Leroy12-216/+17
2021-03-29powerpc/32: Remove ksp_limitChristophe Leroy9-108/+2
2021-03-29powerpc/32: Use fast instruction to set MSR RI in exception prolog on 8xxChristophe Leroy1-0/+2
2021-03-29powerpc/32: Handle bookE debugging in C in exception entryChristophe Leroy2-23/+2
2021-03-29powerpc/32: Entry cpu time accounting in CChristophe Leroy3-11/+3
2021-03-29powerpc/32: Reconcile interrupts in CChristophe Leroy2-58/+4
2021-03-29powerpc/40x: Prepare normal exception handler for enabling MMU earlyChristophe Leroy3-13/+21
2021-03-29powerpc/40x: Prepare for enabling MMU in critical exception prologChristophe Leroy1-3/+37
2021-03-29powerpc/40x: Reorder a few instructions in critical exception prologChristophe Leroy1-4/+4
2021-03-29powerpc/40x: Save SRR0/SRR1 and r10/r11 earlier in critical exceptionChristophe Leroy2-9/+8
2021-03-29powerpc/40x: Change CRITICAL_EXCEPTION_PROLOG macro to a gas macroChristophe Leroy1-35/+36
2021-03-29powerpc/40x: Don't use SPRN_SPRG_SCRATCH0/1 in TLB miss handlersChristophe Leroy1-21/+18
2021-03-29powerpc/traps: Declare unrecoverable_exception() as __noreturnChristophe Leroy2-2/+5
2021-03-29cxl: don't manipulate the mm.mm_users field directlyLaurent Dufour1-1/+1
2021-03-29powerpc/uprobes: Validation for prefixed instructionRavi Bangoria1-0/+7
2021-03-29powerpc/signal: Use __get_user() to copy sigset_tChristopher M. Riedl3-3/+10
2021-03-29powerpc/signal64: Rewrite rt_sigreturn() to minimise uaccess switchesDaniel Axtens1-4/+6
2021-03-29powerpc/signal64: Rewrite handle_rt_signal64() to minimise uaccess switchesDaniel Axtens1-21/+36
2021-03-29powerpc/signal64: Replace restore_sigcontext() w/ unsafe_restore_sigcontext()Christopher M. Riedl1-27/+41
2021-03-29powerpc/signal64: Replace setup_sigcontext() w/ unsafe_setup_sigcontext()Christopher M. Riedl1-27/+45
2021-03-29powerpc/signal64: Remove TM ifdefery in middle of if/else blockChristopher M. Riedl2-51/+54
2021-03-29powerpc: Reference parameter in MSR_TM_ACTIVE() macroChristopher M. Riedl1-1/+1
2021-03-29powerpc/signal64: Remove non-inline calls from setup_sigcontext()Christopher M. Riedl1-11/+21
2021-03-29powerpc/signal: Add unsafe_copy_{vsx, fpr}_from_user()Christopher M. Riedl1-0/+26
2021-03-29powerpc/uaccess: Add unsafe_copy_from_user()Christopher M. Riedl1-0/+21
2021-03-29powerpc/qspinlock: Use generic smp_cond_load_relaxedDavidlohr Bueso2-16/+7
2021-03-26powerpc/spinlock: Unserialize spin_is_lockedDavidlohr Bueso2-14/+1
2021-03-26powerpc/spinlock: Define smp_mb__after_spinlock only onceDavidlohr Bueso3-5/+3