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-rw-r--r--arch/frv/mb93090-mb00/Makefile16
-rw-r--r--arch/frv/mb93090-mb00/flash.c90
-rw-r--r--arch/frv/mb93090-mb00/pci-dma-nommu.c176
-rw-r--r--arch/frv/mb93090-mb00/pci-dma.c118
-rw-r--r--arch/frv/mb93090-mb00/pci-frv.c193
-rw-r--r--arch/frv/mb93090-mb00/pci-frv.h33
-rw-r--r--arch/frv/mb93090-mb00/pci-irq.c62
-rw-r--r--arch/frv/mb93090-mb00/pci-vdk.c419
8 files changed, 0 insertions, 1107 deletions
diff --git a/arch/frv/mb93090-mb00/Makefile b/arch/frv/mb93090-mb00/Makefile
deleted file mode 100644
index bcb03ebb3583..000000000000
--- a/arch/frv/mb93090-mb00/Makefile
+++ /dev/null
@@ -1,16 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0
-#
-# Makefile for the MB93090-MB00 motherboard stuff
-#
-
-ifeq "$(CONFIG_PCI)" "y"
-obj-y := pci-frv.o pci-irq.o pci-vdk.o
-
-ifeq "$(CONFIG_MMU)" "y"
-obj-y += pci-dma.o
-else
-obj-y += pci-dma-nommu.o
-endif
-endif
-
-obj-$(CONFIG_MTD) += flash.o
diff --git a/arch/frv/mb93090-mb00/flash.c b/arch/frv/mb93090-mb00/flash.c
deleted file mode 100644
index e1cf802d1639..000000000000
--- a/arch/frv/mb93090-mb00/flash.c
+++ /dev/null
@@ -1,90 +0,0 @@
-/* Flash mappings for the MB93090-MB00 motherboard
- *
- * Copyright (C) 2009 Red Hat, Inc. All Rights Reserved.
- * Written by David Howells (dhowells@redhat.com)
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public Licence
- * as published by the Free Software Foundation; either version
- * 2 of the Licence, or (at your option) any later version.
- */
-
-#include <linux/module.h>
-#include <linux/platform_device.h>
-#include <linux/mtd/partitions.h>
-#include <linux/mtd/physmap.h>
-
-#define MB93090_BOOTROM_ADDR 0xFF000000 /* Boot ROM */
-#define MB93090_BOOTROM_SIZE (2 * 1024 * 1024)
-#define MB93090_USERROM_ADDR 0xFF200000 /* User ROM */
-#define MB93090_USERROM_SIZE (2 * 1024 * 1024)
-
-/*
- * default MTD partition table for both main flash devices, expected to be
- * overridden by RedBoot
- */
-static struct mtd_partition mb93090_partitions[] = {
- {
- .name = "Filesystem",
- .size = MTDPART_SIZ_FULL,
- .offset = 0,
- }
-};
-
-/*
- * Definition of the MB93090 Boot ROM (on the CPU card)
- */
-static struct physmap_flash_data mb93090_bootrom_data = {
- .width = 2,
- .nr_parts = 2,
- .parts = mb93090_partitions,
-};
-
-static struct resource mb93090_bootrom_resource = {
- .start = MB93090_BOOTROM_ADDR,
- .end = MB93090_BOOTROM_ADDR + MB93090_BOOTROM_SIZE - 1,
- .flags = IORESOURCE_MEM,
-};
-
-static struct platform_device mb93090_bootrom = {
- .name = "physmap-flash",
- .id = 0,
- .dev.platform_data = &mb93090_bootrom_data,
- .num_resources = 1,
- .resource = &mb93090_bootrom_resource,
-};
-
-/*
- * Definition of the MB93090 User ROM definition (on the motherboard)
- */
-static struct physmap_flash_data mb93090_userrom_data = {
- .width = 2,
- .nr_parts = 2,
- .parts = mb93090_partitions,
-};
-
-static struct resource mb93090_userrom_resource = {
- .start = MB93090_USERROM_ADDR,
- .end = MB93090_USERROM_ADDR + MB93090_USERROM_SIZE - 1,
- .flags = IORESOURCE_MEM,
-};
-
-static struct platform_device mb93090_userrom = {
- .name = "physmap-flash",
- .id = 1,
- .dev.platform_data = &mb93090_userrom_data,
- .num_resources = 1,
- .resource = &mb93090_userrom_resource,
-};
-
-/*
- * register the MB93090 flashes
- */
-static int __init mb93090_mtd_init(void)
-{
- platform_device_register(&mb93090_bootrom);
- platform_device_register(&mb93090_userrom);
- return 0;
-}
-
-module_init(mb93090_mtd_init);
diff --git a/arch/frv/mb93090-mb00/pci-dma-nommu.c b/arch/frv/mb93090-mb00/pci-dma-nommu.c
deleted file mode 100644
index 4a96de7f0af4..000000000000
--- a/arch/frv/mb93090-mb00/pci-dma-nommu.c
+++ /dev/null
@@ -1,176 +0,0 @@
-/* pci-dma-nommu.c: Dynamic DMA mapping support for the FRV
- *
- * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
- * Written by David Woodhouse (dwmw2@infradead.org)
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include <linux/types.h>
-#include <linux/slab.h>
-#include <linux/export.h>
-#include <linux/dma-mapping.h>
-#include <linux/list.h>
-#include <linux/pci.h>
-#include <asm/io.h>
-
-#if 1
-#define DMA_SRAM_START dma_coherent_mem_start
-#define DMA_SRAM_END dma_coherent_mem_end
-#else // Use video RAM on Matrox
-#define DMA_SRAM_START 0xe8900000
-#define DMA_SRAM_END 0xe8a00000
-#endif
-
-struct dma_alloc_record {
- struct list_head list;
- unsigned long ofs;
- unsigned long len;
-};
-
-static DEFINE_SPINLOCK(dma_alloc_lock);
-static LIST_HEAD(dma_alloc_list);
-
-static void *frv_dma_alloc(struct device *hwdev, size_t size, dma_addr_t *dma_handle,
- gfp_t gfp, unsigned long attrs)
-{
- struct dma_alloc_record *new;
- struct list_head *this = &dma_alloc_list;
- unsigned long flags;
- unsigned long start = DMA_SRAM_START;
- unsigned long end;
-
- if (!DMA_SRAM_START) {
- printk("%s called without any DMA area reserved!\n", __func__);
- return NULL;
- }
-
- new = kmalloc(sizeof (*new), GFP_ATOMIC);
- if (!new)
- return NULL;
-
- /* Round up to a reasonable alignment */
- new->len = (size + 31) & ~31;
-
- spin_lock_irqsave(&dma_alloc_lock, flags);
-
- list_for_each (this, &dma_alloc_list) {
- struct dma_alloc_record *this_r = list_entry(this, struct dma_alloc_record, list);
- end = this_r->ofs;
-
- if (end - start >= size)
- goto gotone;
-
- start = this_r->ofs + this_r->len;
- }
- /* Reached end of list. */
- end = DMA_SRAM_END;
- this = &dma_alloc_list;
-
- if (end - start >= size) {
- gotone:
- new->ofs = start;
- list_add_tail(&new->list, this);
- spin_unlock_irqrestore(&dma_alloc_lock, flags);
-
- *dma_handle = start;
- return (void *)start;
- }
-
- kfree(new);
- spin_unlock_irqrestore(&dma_alloc_lock, flags);
- return NULL;
-}
-
-static void frv_dma_free(struct device *hwdev, size_t size, void *vaddr,
- dma_addr_t dma_handle, unsigned long attrs)
-{
- struct dma_alloc_record *rec;
- unsigned long flags;
-
- spin_lock_irqsave(&dma_alloc_lock, flags);
-
- list_for_each_entry(rec, &dma_alloc_list, list) {
- if (rec->ofs == dma_handle) {
- list_del(&rec->list);
- kfree(rec);
- spin_unlock_irqrestore(&dma_alloc_lock, flags);
- return;
- }
- }
- spin_unlock_irqrestore(&dma_alloc_lock, flags);
- BUG();
-}
-
-static int frv_dma_map_sg(struct device *dev, struct scatterlist *sglist,
- int nents, enum dma_data_direction direction,
- unsigned long attrs)
-{
- struct scatterlist *sg;
- int i;
-
- BUG_ON(direction == DMA_NONE);
-
- if (attrs & DMA_ATTR_SKIP_CPU_SYNC)
- return nents;
-
- for_each_sg(sglist, sg, nents, i) {
- frv_cache_wback_inv(sg_dma_address(sg),
- sg_dma_address(sg) + sg_dma_len(sg));
- }
-
- return nents;
-}
-
-static dma_addr_t frv_dma_map_page(struct device *dev, struct page *page,
- unsigned long offset, size_t size,
- enum dma_data_direction direction, unsigned long attrs)
-{
- BUG_ON(direction == DMA_NONE);
-
- if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
- flush_dcache_page(page);
-
- return (dma_addr_t) page_to_phys(page) + offset;
-}
-
-static void frv_dma_sync_single_for_device(struct device *dev,
- dma_addr_t dma_handle, size_t size,
- enum dma_data_direction direction)
-{
- flush_write_buffers();
-}
-
-static void frv_dma_sync_sg_for_device(struct device *dev,
- struct scatterlist *sg, int nelems,
- enum dma_data_direction direction)
-{
- flush_write_buffers();
-}
-
-
-static int frv_dma_supported(struct device *dev, u64 mask)
-{
- /*
- * we fall back to GFP_DMA when the mask isn't all 1s,
- * so we can't guarantee allocations that must be
- * within a tighter range than GFP_DMA..
- */
- if (mask < 0x00ffffff)
- return 0;
- return 1;
-}
-
-const struct dma_map_ops frv_dma_ops = {
- .alloc = frv_dma_alloc,
- .free = frv_dma_free,
- .map_page = frv_dma_map_page,
- .map_sg = frv_dma_map_sg,
- .sync_single_for_device = frv_dma_sync_single_for_device,
- .sync_sg_for_device = frv_dma_sync_sg_for_device,
- .dma_supported = frv_dma_supported,
-};
-EXPORT_SYMBOL(frv_dma_ops);
diff --git a/arch/frv/mb93090-mb00/pci-dma.c b/arch/frv/mb93090-mb00/pci-dma.c
deleted file mode 100644
index e7130abc0dae..000000000000
--- a/arch/frv/mb93090-mb00/pci-dma.c
+++ /dev/null
@@ -1,118 +0,0 @@
-/* pci-dma.c: Dynamic DMA mapping support for the FRV CPUs that have MMUs
- *
- * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
- * Written by David Howells (dhowells@redhat.com)
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include <linux/types.h>
-#include <linux/dma-mapping.h>
-#include <linux/list.h>
-#include <linux/pci.h>
-#include <linux/export.h>
-#include <linux/highmem.h>
-#include <linux/scatterlist.h>
-#include <asm/io.h>
-
-static void *frv_dma_alloc(struct device *hwdev, size_t size,
- dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
-{
- void *ret;
-
- ret = consistent_alloc(gfp, size, dma_handle);
- if (ret)
- memset(ret, 0, size);
-
- return ret;
-}
-
-static void frv_dma_free(struct device *hwdev, size_t size, void *vaddr,
- dma_addr_t dma_handle, unsigned long attrs)
-{
- consistent_free(vaddr);
-}
-
-static int frv_dma_map_sg(struct device *dev, struct scatterlist *sglist,
- int nents, enum dma_data_direction direction,
- unsigned long attrs)
-{
- struct scatterlist *sg;
- unsigned long dampr2;
- void *vaddr;
- int i;
-
- BUG_ON(direction == DMA_NONE);
-
- if (attrs & DMA_ATTR_SKIP_CPU_SYNC)
- return nents;
-
- dampr2 = __get_DAMPR(2);
-
- for_each_sg(sglist, sg, nents, i) {
- vaddr = kmap_atomic_primary(sg_page(sg));
-
- frv_dcache_writeback((unsigned long) vaddr,
- (unsigned long) vaddr + PAGE_SIZE);
-
- }
-
- kunmap_atomic_primary(vaddr);
- if (dampr2) {
- __set_DAMPR(2, dampr2);
- __set_IAMPR(2, dampr2);
- }
-
- return nents;
-}
-
-static dma_addr_t frv_dma_map_page(struct device *dev, struct page *page,
- unsigned long offset, size_t size,
- enum dma_data_direction direction, unsigned long attrs)
-{
- if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
- flush_dcache_page(page);
-
- return (dma_addr_t) page_to_phys(page) + offset;
-}
-
-static void frv_dma_sync_single_for_device(struct device *dev,
- dma_addr_t dma_handle, size_t size,
- enum dma_data_direction direction)
-{
- flush_write_buffers();
-}
-
-static void frv_dma_sync_sg_for_device(struct device *dev,
- struct scatterlist *sg, int nelems,
- enum dma_data_direction direction)
-{
- flush_write_buffers();
-}
-
-
-static int frv_dma_supported(struct device *dev, u64 mask)
-{
- /*
- * we fall back to GFP_DMA when the mask isn't all 1s,
- * so we can't guarantee allocations that must be
- * within a tighter range than GFP_DMA..
- */
- if (mask < 0x00ffffff)
- return 0;
- return 1;
-}
-
-const struct dma_map_ops frv_dma_ops = {
- .alloc = frv_dma_alloc,
- .free = frv_dma_free,
- .map_page = frv_dma_map_page,
- .map_sg = frv_dma_map_sg,
- .sync_single_for_device = frv_dma_sync_single_for_device,
- .sync_sg_for_device = frv_dma_sync_sg_for_device,
- .dma_supported = frv_dma_supported,
-};
-EXPORT_SYMBOL(frv_dma_ops);
diff --git a/arch/frv/mb93090-mb00/pci-frv.c b/arch/frv/mb93090-mb00/pci-frv.c
deleted file mode 100644
index c452ddb5620f..000000000000
--- a/arch/frv/mb93090-mb00/pci-frv.c
+++ /dev/null
@@ -1,193 +0,0 @@
-/* pci-frv.c: low-level PCI access routines
- *
- * Copyright (C) 2003-5 Red Hat, Inc. All Rights Reserved.
- * Written by David Howells (dhowells@redhat.com)
- * - Derived from the i386 equivalent stuff
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/pci.h>
-#include <linux/init.h>
-#include <linux/ioport.h>
-#include <linux/errno.h>
-
-#include "pci-frv.h"
-
-/*
- * We need to avoid collisions with `mirrored' VGA ports
- * and other strange ISA hardware, so we always want the
- * addresses to be allocated in the 0x000-0x0ff region
- * modulo 0x400.
- *
- * Why? Because some silly external IO cards only decode
- * the low 10 bits of the IO address. The 0x00-0xff region
- * is reserved for motherboard devices that decode all 16
- * bits, so it's ok to allocate at, say, 0x2800-0x28ff,
- * but we want to try to avoid allocating at 0x2900-0x2bff
- * which might have be mirrored at 0x0100-0x03ff..
- */
-resource_size_t
-pcibios_align_resource(void *data, const struct resource *res,
- resource_size_t size, resource_size_t align)
-{
- resource_size_t start = res->start;
-
- if ((res->flags & IORESOURCE_IO) && (start & 0x300))
- start = (start + 0x3ff) & ~0x3ff;
-
- return start;
-}
-
-
-/*
- * Handle resources of PCI devices. If the world were perfect, we could
- * just allocate all the resource regions and do nothing more. It isn't.
- * On the other hand, we cannot just re-allocate all devices, as it would
- * require us to know lots of host bridge internals. So we attempt to
- * keep as much of the original configuration as possible, but tweak it
- * when it's found to be wrong.
- *
- * Known BIOS problems we have to work around:
- * - I/O or memory regions not configured
- * - regions configured, but not enabled in the command register
- * - bogus I/O addresses above 64K used
- * - expansion ROMs left enabled (this may sound harmless, but given
- * the fact the PCI specs explicitly allow address decoders to be
- * shared between expansion ROMs and other resource regions, it's
- * at least dangerous)
- *
- * Our solution:
- * (1) Allocate resources for all buses behind PCI-to-PCI bridges.
- * This gives us fixed barriers on where we can allocate.
- * (2) Allocate resources for all enabled devices. If there is
- * a collision, just mark the resource as unallocated. Also
- * disable expansion ROMs during this step.
- * (3) Try to allocate resources for disabled devices. If the
- * resources were assigned correctly, everything goes well,
- * if they weren't, they won't disturb allocation of other
- * resources.
- * (4) Assign new addresses to resources which were either
- * not configured at all or misconfigured. If explicitly
- * requested by the user, configure expansion ROM address
- * as well.
- */
-
-static void __init pcibios_allocate_bus_resources(struct list_head *bus_list)
-{
- struct list_head *ln;
- struct pci_bus *bus;
- struct pci_dev *dev;
- int idx;
- struct resource *r;
-
- /* Depth-First Search on bus tree */
- for (ln=bus_list->next; ln != bus_list; ln=ln->next) {
- bus = list_entry(ln, struct pci_bus, node);
- if ((dev = bus->self)) {
- for (idx = PCI_BRIDGE_RESOURCES; idx < PCI_NUM_RESOURCES; idx++) {
- r = &dev->resource[idx];
- if (!r->start)
- continue;
- pci_claim_bridge_resource(dev, idx);
- }
- }
- pcibios_allocate_bus_resources(&bus->children);
- }
-}
-
-static void __init pcibios_allocate_resources(int pass)
-{
- struct pci_dev *dev = NULL;
- int idx, disabled;
- u16 command;
- struct resource *r;
-
- for_each_pci_dev(dev) {
- pci_read_config_word(dev, PCI_COMMAND, &command);
- for(idx = 0; idx < 6; idx++) {
- r = &dev->resource[idx];
- if (r->parent) /* Already allocated */
- continue;
- if (!r->start) /* Address not assigned at all */
- continue;
- if (r->flags & IORESOURCE_IO)
- disabled = !(command & PCI_COMMAND_IO);
- else
- disabled = !(command & PCI_COMMAND_MEMORY);
- if (pass == disabled) {
- DBG("PCI: Resource %08lx-%08lx (f=%lx, d=%d, p=%d)\n",
- r->start, r->end, r->flags, disabled, pass);
- if (pci_claim_resource(dev, idx) < 0) {
- /* We'll assign a new address later */
- r->end -= r->start;
- r->start = 0;
- }
- }
- }
- if (!pass) {
- r = &dev->resource[PCI_ROM_RESOURCE];
- if (r->flags & IORESOURCE_ROM_ENABLE) {
- /* Turn the ROM off, leave the resource region, but keep it unregistered. */
- u32 reg;
- DBG("PCI: Switching off ROM of %s\n", pci_name(dev));
- r->flags &= ~IORESOURCE_ROM_ENABLE;
- pci_read_config_dword(dev, dev->rom_base_reg, &reg);
- pci_write_config_dword(dev, dev->rom_base_reg, reg & ~PCI_ROM_ADDRESS_ENABLE);
- }
- }
- }
-}
-
-static void __init pcibios_assign_resources(void)
-{
- struct pci_dev *dev = NULL;
- int idx, err;
- struct resource *r;
-
- for_each_pci_dev(dev) {
- int class = dev->class >> 8;
-
- /* Don't touch classless devices and host bridges */
- if (!class || class == PCI_CLASS_BRIDGE_HOST)
- continue;
-
- for(idx=0; idx<6; idx++) {
- r = &dev->resource[idx];
-
- /*
- * Don't touch IDE controllers and I/O ports of video cards!
- */
- if ((class == PCI_CLASS_STORAGE_IDE && idx < 4) ||
- (class == PCI_CLASS_DISPLAY_VGA && (r->flags & IORESOURCE_IO)))
- continue;
-
- /*
- * We shall assign a new address to this resource, either because
- * the BIOS forgot to do so or because we have decided the old
- * address was unusable for some reason.
- */
- if (!r->start && r->end) {
- err = pci_assign_resource(dev, idx);
- if (err)
- dev_err(&dev->dev,
- "Failed to assign new address to %d\n",
- idx);
- }
- }
- }
-}
-
-void __init pcibios_resource_survey(void)
-{
- DBG("PCI: Allocating resources\n");
- pcibios_allocate_bus_resources(&pci_root_buses);
- pcibios_allocate_resources(0);
- pcibios_allocate_resources(1);
- pcibios_assign_resources();
-}
diff --git a/arch/frv/mb93090-mb00/pci-frv.h b/arch/frv/mb93090-mb00/pci-frv.h
deleted file mode 100644
index 41fbb6bae558..000000000000
--- a/arch/frv/mb93090-mb00/pci-frv.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Low-Level PCI Access for FRV machines.
- *
- * (c) 1999 Martin Mares <mj@ucw.cz>
- */
-
-#include <asm/sections.h>
-
-#undef DEBUG
-
-#ifdef DEBUG
-#define DBG(x...) printk(x)
-#else
-#define DBG(x...)
-#endif
-
-extern unsigned int __nongpreldata pci_probe;
-
-/* pci-frv.c */
-
-void pcibios_resource_survey(void);
-
-/* pci-vdk.c */
-
-extern struct pci_ops *__nongpreldata pci_root_ops;
-
-/* pci-irq.c */
-extern unsigned int pcibios_irq_mask;
-
-void pcibios_irq_init(void);
-void pcibios_fixup_irqs(void);
-void pcibios_enable_irq(struct pci_dev *dev);
diff --git a/arch/frv/mb93090-mb00/pci-irq.c b/arch/frv/mb93090-mb00/pci-irq.c
deleted file mode 100644
index a40aa8663056..000000000000
--- a/arch/frv/mb93090-mb00/pci-irq.c
+++ /dev/null
@@ -1,62 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/* pci-irq.c: PCI IRQ routing on the FRV motherboard
- *
- * Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
- * Written by David Howells (dhowells@redhat.com)
- * derived from: arch/i386/kernel/pci-irq.c: (c) 1999--2000 Martin Mares <mj@suse.cz>
- */
-
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/pci.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-
-#include <asm/io.h>
-#include <asm/smp.h>
-
-#include "pci-frv.h"
-
-/*
- * DEVICE DEVNO INT#A INT#B INT#C INT#D
- * ======= ======= ======= ======= ======= =======
- * MB86943 0 fpga.10 - - -
- * RTL8029 16 fpga.12 - - -
- * SLOT 1 19 fpga.6 fpga.5 fpga.4 fpga.3
- * SLOT 2 18 fpga.5 fpga.4 fpga.3 fpga.6
- * SLOT 3 17 fpga.4 fpga.3 fpga.6 fpga.5
- *
- */
-
-static const uint8_t __initconst pci_bus0_irq_routing[32][4] = {
- [0 ] = { IRQ_FPGA_MB86943_PCI_INTA },
- [16] = { IRQ_FPGA_RTL8029_INTA },
- [17] = { IRQ_FPGA_PCI_INTC, IRQ_FPGA_PCI_INTD, IRQ_FPGA_PCI_INTA, IRQ_FPGA_PCI_INTB },
- [18] = { IRQ_FPGA_PCI_INTB, IRQ_FPGA_PCI_INTC, IRQ_FPGA_PCI_INTD, IRQ_FPGA_PCI_INTA },
- [19] = { IRQ_FPGA_PCI_INTA, IRQ_FPGA_PCI_INTB, IRQ_FPGA_PCI_INTC, IRQ_FPGA_PCI_INTD },
-};
-
-void __init pcibios_irq_init(void)
-{
-}
-
-void __init pcibios_fixup_irqs(void)
-{
- struct pci_dev *dev = NULL;
- uint8_t line, pin;
-
- for_each_pci_dev(dev) {
- pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
- if (pin) {
- dev->irq = pci_bus0_irq_routing[PCI_SLOT(dev->devfn)][pin - 1];
- pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
- }
- pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &line);
- }
-}
-
-void pcibios_enable_irq(struct pci_dev *dev)
-{
- pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
-}
diff --git a/arch/frv/mb93090-mb00/pci-vdk.c b/arch/frv/mb93090-mb00/pci-vdk.c
deleted file mode 100644
index f211839e2cae..000000000000
--- a/arch/frv/mb93090-mb00/pci-vdk.c
+++ /dev/null
@@ -1,419 +0,0 @@
-/* pci-vdk.c: MB93090-MB00 (VDK) PCI support
- *
- * Copyright (C) 2003, 2004 Red Hat, Inc. All Rights Reserved.
- * Written by David Howells (dhowells@redhat.com)
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include <linux/types.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/pci.h>
-#include <linux/init.h>
-#include <linux/ioport.h>
-#include <linux/delay.h>
-
-#include <asm/segment.h>
-#include <asm/io.h>
-#include <asm/mb-regs.h>
-#include <asm/mb86943a.h>
-#include "pci-frv.h"
-
-unsigned int __nongpreldata pci_probe = 1;
-
-struct pci_ops *__nongpreldata pci_root_ops;
-
-/*
- * The accessible PCI window does not cover the entire CPU address space, but
- * there are devices we want to access outside of that window, so we need to
- * insert specific PCI bus resources instead of using the platform-level bus
- * resources directly for the PCI root bus.
- *
- * These are configured and inserted by pcibios_init() and are attached to the
- * root bus by pcibios_fixup_bus().
- */
-static struct resource pci_ioport_resource = {
- .name = "PCI IO",
- .start = 0,
- .end = IO_SPACE_LIMIT,
- .flags = IORESOURCE_IO,
-};
-
-static struct resource pci_iomem_resource = {
- .name = "PCI mem",
- .start = 0,
- .end = -1,
- .flags = IORESOURCE_MEM,
-};
-
-/*
- * Functions for accessing PCI configuration space
- */
-
-#define CONFIG_CMD(bus, dev, where) \
- (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3))
-
-#define __set_PciCfgAddr(A) writel((A), (volatile void __iomem *) __region_CS1 + 0x80)
-
-#define __get_PciCfgDataB(A) readb((volatile void __iomem *) __region_CS1 + 0x88 + ((A) & 3))
-#define __get_PciCfgDataW(A) readw((volatile void __iomem *) __region_CS1 + 0x88 + ((A) & 2))
-#define __get_PciCfgDataL(A) readl((volatile void __iomem *) __region_CS1 + 0x88)
-
-#define __set_PciCfgDataB(A,V) \
- writeb((V), (volatile void __iomem *) __region_CS1 + 0x88 + (3 - ((A) & 3)))
-
-#define __set_PciCfgDataW(A,V) \
- writew((V), (volatile void __iomem *) __region_CS1 + 0x88 + (2 - ((A) & 2)))
-
-#define __set_PciCfgDataL(A,V) \
- writel((V), (volatile void __iomem *) __region_CS1 + 0x88)
-
-#define __get_PciBridgeDataB(A) readb((volatile void __iomem *) __region_CS1 + 0x800 + (A))
-#define __get_PciBridgeDataW(A) readw((volatile void __iomem *) __region_CS1 + 0x800 + (A))
-#define __get_PciBridgeDataL(A) readl((volatile void __iomem *) __region_CS1 + 0x800 + (A))
-
-#define __set_PciBridgeDataB(A,V) writeb((V), (volatile void __iomem *) __region_CS1 + 0x800 + (A))
-#define __set_PciBridgeDataW(A,V) writew((V), (volatile void __iomem *) __region_CS1 + 0x800 + (A))
-#define __set_PciBridgeDataL(A,V) writel((V), (volatile void __iomem *) __region_CS1 + 0x800 + (A))
-
-static inline int __query(const struct pci_dev *dev)
-{
-// return dev->bus->number==0 && (dev->devfn==PCI_DEVFN(0,0));
-// return dev->bus->number==1;
-// return dev->bus->number==0 &&
-// (dev->devfn==PCI_DEVFN(2,0) || dev->devfn==PCI_DEVFN(3,0));
- return 0;
-}
-
-/*****************************************************************************/
-/*
- *
- */
-static int pci_frv_read_config(struct pci_bus *bus, unsigned int devfn, int where, int size,
- u32 *val)
-{
- u32 _value;
-
- if (bus->number == 0 && devfn == PCI_DEVFN(0, 0)) {
- _value = __get_PciBridgeDataL(where & ~3);
- }
- else {
- __set_PciCfgAddr(CONFIG_CMD(bus, devfn, where));
- _value = __get_PciCfgDataL(where & ~3);
- }
-
- switch (size) {
- case 1:
- _value = _value >> ((where & 3) * 8);
- break;
-
- case 2:
- _value = _value >> ((where & 2) * 8);
- break;
-
- case 4:
- break;
-
- default:
- BUG();
- }
-
- *val = _value;
- return PCIBIOS_SUCCESSFUL;
-}
-
-static int pci_frv_write_config(struct pci_bus *bus, unsigned int devfn, int where, int size,
- u32 value)
-{
- switch (size) {
- case 1:
- if (bus->number == 0 && devfn == PCI_DEVFN(0, 0)) {
- __set_PciBridgeDataB(where, value);
- }
- else {
- __set_PciCfgAddr(CONFIG_CMD(bus, devfn, where));
- __set_PciCfgDataB(where, value);
- }
- break;
-
- case 2:
- if (bus->number == 0 && devfn == PCI_DEVFN(0, 0)) {
- __set_PciBridgeDataW(where, value);
- }
- else {
- __set_PciCfgAddr(CONFIG_CMD(bus, devfn, where));
- __set_PciCfgDataW(where, value);
- }
- break;
-
- case 4:
- if (bus->number == 0 && devfn == PCI_DEVFN(0, 0)) {
- __set_PciBridgeDataL(where, value);
- }
- else {
- __set_PciCfgAddr(CONFIG_CMD(bus, devfn, where));
- __set_PciCfgDataL(where, value);
- }
- break;
-
- default:
- BUG();
- }
-
- return PCIBIOS_SUCCESSFUL;
-}
-
-static struct pci_ops pci_direct_frv = {
- .read = pci_frv_read_config,
- .write = pci_frv_write_config,
-};
-
-/*
- * Before we decide to use direct hardware access mechanisms, we try to do some
- * trivial checks to ensure it at least _seems_ to be working -- we just test
- * whether bus 00 contains a host bridge (this is similar to checking
- * techniques used in XFree86, but ours should be more reliable since we
- * attempt to make use of direct access hints provided by the PCI BIOS).
- *
- * This should be close to trivial, but it isn't, because there are buggy
- * chipsets (yes, you guessed it, by Intel and Compaq) that have no class ID.
- */
-static int __init pci_sanity_check(struct pci_ops *o)
-{
- struct pci_bus bus; /* Fake bus and device */
- u32 id;
-
- bus.number = 0;
-
- if (o->read(&bus, 0, PCI_VENDOR_ID, 4, &id) == PCIBIOS_SUCCESSFUL) {
- printk("PCI: VDK Bridge device:vendor: %08x\n", id);
- if (id == 0x200e10cf)
- return 1;
- }
-
- printk("PCI: VDK Bridge: Sanity check failed\n");
- return 0;
-}
-
-static struct pci_ops * __init pci_check_direct(void)
-{
- unsigned long flags;
-
- local_irq_save(flags);
-
- /* check if access works */
- if (pci_sanity_check(&pci_direct_frv)) {
- local_irq_restore(flags);
- printk("PCI: Using configuration frv\n");
-// request_mem_region(0xBE040000, 256, "FRV bridge");
-// request_mem_region(0xBFFFFFF4, 12, "PCI frv");
- return &pci_direct_frv;
- }
-
- local_irq_restore(flags);
- return NULL;
-}
-
-/*
- * Exceptions for specific devices. Usually work-arounds for fatal design flaws.
- */
-
-static void __init pci_fixup_umc_ide(struct pci_dev *d)
-{
- /*
- * UM8886BF IDE controller sets region type bits incorrectly,
- * therefore they look like memory despite of them being I/O.
- */
- int i;
-
- printk("PCI: Fixing base address flags for device %s\n", pci_name(d));
- for(i=0; i<4; i++)
- d->resource[i].flags |= PCI_BASE_ADDRESS_SPACE_IO;
-}
-
-static void pci_fixup_ide_bases(struct pci_dev *d)
-{
- int i;
-
- /*
- * PCI IDE controllers use non-standard I/O port decoding, respect it.
- */
- if ((d->class >> 8) != PCI_CLASS_STORAGE_IDE)
- return;
- printk("PCI: IDE base address fixup for %s\n", pci_name(d));
- for(i=0; i<4; i++) {
- struct resource *r = &d->resource[i];
- if ((r->start & ~0x80) == 0x374) {
- r->start |= 2;
- r->end = r->start;
- }
- }
-}
-
-static void pci_fixup_ide_trash(struct pci_dev *d)
-{
- int i;
-
- /*
- * There exist PCI IDE controllers which have utter garbage
- * in first four base registers. Ignore that.
- */
- printk("PCI: IDE base address trash cleared for %s\n", pci_name(d));
- for(i=0; i<4; i++)
- d->resource[i].start = d->resource[i].end = d->resource[i].flags = 0;
-}
-
-static void pci_fixup_latency(struct pci_dev *d)
-{
- /*
- * SiS 5597 and 5598 chipsets require latency timer set to
- * at most 32 to avoid lockups.
- */
- DBG("PCI: Setting max latency to 32\n");
- pcibios_max_latency = 32;
-}
-
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_UMC, PCI_DEVICE_ID_UMC_UM8886BF, pci_fixup_umc_ide);
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_5513, pci_fixup_ide_trash);
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_5597, pci_fixup_latency);
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_5598, pci_fixup_latency);
-DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases);
-
-/*
- * Called after each bus is probed, but before its children
- * are examined.
- */
-
-void pcibios_fixup_bus(struct pci_bus *bus)
-{
-#if 0
- printk("### PCIBIOS_FIXUP_BUS(%d)\n",bus->number);
-#endif
-
- pci_read_bridge_bases(bus);
-
- if (bus->number == 0) {
- struct pci_dev *dev;
- list_for_each_entry(dev, &bus->devices, bus_list) {
- if (dev->devfn == 0) {
- dev->resource[0].start = 0;
- dev->resource[0].end = 0;
- }
- }
- }
-}
-
-/*
- * Initialization. Try all known PCI access methods. Note that we support
- * using both PCI BIOS and direct access: in such cases, we use I/O ports
- * to access config space, but we still keep BIOS order of cards to be
- * compatible with 2.0.X. This should go away some day.
- */
-
-int __init pcibios_init(void)
-{
- struct pci_bus *bus;
- struct pci_ops *dir = NULL;
- LIST_HEAD(resources);
-
- if (!mb93090_mb00_detected)
- return -ENXIO;
-
- __reg_MB86943_sl_ctl |= MB86943_SL_CTL_DRCT_MASTER_SWAP | MB86943_SL_CTL_DRCT_SLAVE_SWAP;
-
- __reg_MB86943_ecs_base(1) = ((__region_CS2 + 0x01000000) >> 9) | 0x08000000;
- __reg_MB86943_ecs_base(2) = ((__region_CS2 + 0x00000000) >> 9) | 0x08000000;
-
- *(volatile uint32_t *) (__region_CS1 + 0x848) = 0xe0000000;
- *(volatile uint32_t *) (__region_CS1 + 0x8b8) = 0x00000000;
-
- __reg_MB86943_sl_pci_io_base = (__region_CS2 + 0x04000000) >> 9;
- __reg_MB86943_sl_pci_mem_base = (__region_CS2 + 0x08000000) >> 9;
- __reg_MB86943_pci_sl_io_base = __region_CS2 + 0x04000000;
- __reg_MB86943_pci_sl_mem_base = __region_CS2 + 0x08000000;
- mb();
-
- /* enable PCI arbitration */
- __reg_MB86943_pci_arbiter = MB86943_PCIARB_EN;
-
- pci_ioport_resource.start = (__reg_MB86943_sl_pci_io_base << 9) & 0xfffffc00;
- pci_ioport_resource.end = (__reg_MB86943_sl_pci_io_range << 9) | 0x3ff;
- pci_ioport_resource.end += pci_ioport_resource.start;
-
- printk("PCI IO window: %08llx-%08llx\n",
- (unsigned long long) pci_ioport_resource.start,
- (unsigned long long) pci_ioport_resource.end);
-
- pci_iomem_resource.start = (__reg_MB86943_sl_pci_mem_base << 9) & 0xfffffc00;
- pci_iomem_resource.end = (__reg_MB86943_sl_pci_mem_range << 9) | 0x3ff;
- pci_iomem_resource.end += pci_iomem_resource.start;
-
- /* Reserve somewhere to write to flush posted writes. This is used by
- * __flush_PCI_writes() from asm/io.h to force the write FIFO in the
- * CPU-PCI bridge to flush as this doesn't happen automatically when a
- * read is performed on the MB93090 development kit motherboard.
- */
- pci_iomem_resource.start += 0x400;
-
- printk("PCI MEM window: %08llx-%08llx\n",
- (unsigned long long) pci_iomem_resource.start,
- (unsigned long long) pci_iomem_resource.end);
- printk("PCI DMA memory: %08lx-%08lx\n",
- dma_coherent_mem_start, dma_coherent_mem_end);
-
- if (insert_resource(&iomem_resource, &pci_iomem_resource) < 0)
- panic("Unable to insert PCI IOMEM resource\n");
- if (insert_resource(&ioport_resource, &pci_ioport_resource) < 0)
- panic("Unable to insert PCI IOPORT resource\n");
-
- if (!pci_probe)
- return -ENXIO;
-
- dir = pci_check_direct();
- if (dir)
- pci_root_ops = dir;
- else {
- printk("PCI: No PCI bus detected\n");
- return -ENXIO;
- }
-
- printk("PCI: Probing PCI hardware\n");
- pci_add_resource(&resources, &pci_ioport_resource);
- pci_add_resource(&resources, &pci_iomem_resource);
- bus = pci_scan_root_bus(NULL, 0, pci_root_ops, NULL, &resources);
-
- pcibios_irq_init();
- pcibios_fixup_irqs();
- pcibios_resource_survey();
- if (!bus)
- return 0;
-
- pci_bus_add_devices(bus);
- return 0;
-}
-
-arch_initcall(pcibios_init);
-
-char * __init pcibios_setup(char *str)
-{
- if (!strcmp(str, "off")) {
- pci_probe = 0;
- return NULL;
- }
- return str;
-}
-
-int pcibios_enable_device(struct pci_dev *dev, int mask)
-{
- int err;
-
- if ((err = pci_enable_resources(dev, mask)) < 0)
- return err;
- if (!dev->msi_enabled)
- pcibios_enable_irq(dev);
- return 0;
-}