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authorTakeshi Kihara <takeshi.kihara.df@renesas.com>2017-07-13 01:55:38 +0900
committerGeert Uytterhoeven <geert+renesas@glider.be>2017-07-17 11:01:38 +0200
commitdda7e6ce8e58328053242b5dbe6f9f10a673302c (patch)
treec9935c696f09c1c631db7ea358f1b4c3f745c03e /mm/mmap.c
parent04ee2ab395db733c04f02b6ba0d8f13aa0a5d744 (diff)
pinctrl: sh-pfc: r8a7796: Fix SCIF_CLK_{A,B} pin's MOD_SEL assignment to MOD_SEL1 bit10
This patch fixes SCIF_CLK_{A,B} pin's MOD_SEL assignment from MOD_SEL1 bit11 to MOD_SEL1 bit10. This is a correction to the incorrect implementation of IPSR register pin assignment for R8A7796 SoC specification of R-Car Gen3 Hardware User's Manual Rev.0.51E or later. Fixes: f9aece7344bd81ce ("pinctrl: sh-pfc: Initial R8A7796 PFC support") Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'mm/mmap.c')
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