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authorTejun Heo <tj@kernel.org>2009-09-22 17:34:17 +0900
committerJesse Barnes <jbarnes@virtuousgeek.org>2009-11-04 08:47:10 -0800
commit4c0eec7a86303ce6e3edf7825d0ef1d414e76767 (patch)
tree21a073cf9669861cc28593d23ad59bf3dcb9a732 /drivers/pci/pci.c
parentac1aa47b131416a6ff37eb1005a0a1d2541aad6c (diff)
sparc64/PCI: drop PCI_CACHE_LINE_BYTES
sparc64 is now the only user of PCI_CACHE_LINE_BYTES. Drop it and set pci_dfl_cache_line_size from pcibios_init() instead and drop PCI_CACHE_LINE_BYTES handling from generic pci code. Orignally-From: David Miller <davem@davemloft.net> Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'drivers/pci/pci.c')
-rw-r--r--drivers/pci/pci.c6
1 files changed, 1 insertions, 5 deletions
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 1f9a7a03847b..01337b7a215f 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -47,17 +47,13 @@ unsigned long pci_cardbus_mem_size = DEFAULT_CARDBUS_MEM_SIZE;
unsigned long pci_hotplug_io_size = DEFAULT_HOTPLUG_IO_SIZE;
unsigned long pci_hotplug_mem_size = DEFAULT_HOTPLUG_MEM_SIZE;
-#ifndef PCI_CACHE_LINE_BYTES
-#define PCI_CACHE_LINE_BYTES L1_CACHE_BYTES
-#endif
-
/*
* The default CLS is used if arch didn't set CLS explicitly and not
* all pci devices agree on the same value. Arch can override either
* the dfl or actual value as it sees fit. Don't forget this is
* measured in 32-bit words, not bytes.
*/
-u8 pci_dfl_cache_line_size __initdata = PCI_CACHE_LINE_BYTES >> 2;
+u8 pci_dfl_cache_line_size __initdata = L1_CACHE_BYTES >> 2;
u8 pci_cache_line_size;
/**