From 20e075585973453515be6615b91901c959e0a573 Mon Sep 17 00:00:00 2001 From: Zhangfei Gao Date: Tue, 13 May 2014 20:26:59 +0800 Subject: clk: hix5hd2: add complex clk Support clk of sata, usb and ethernet Signed-off-by: Jiancheng Xue Signed-off-by: Zhangfei Gao Signed-off-by: Wei Xu --- include/dt-bindings/clock/hix5hd2-clock.h | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'include/dt-bindings') diff --git a/include/dt-bindings/clock/hix5hd2-clock.h b/include/dt-bindings/clock/hix5hd2-clock.h index aad579a75802..e3286695382d 100644 --- a/include/dt-bindings/clock/hix5hd2-clock.h +++ b/include/dt-bindings/clock/hix5hd2-clock.h @@ -53,6 +53,15 @@ #define HIX5HD2_MMC_CIU_CLK 130 #define HIX5HD2_MMC_BIU_CLK 131 #define HIX5HD2_MMC_CIU_RST 132 +#define HIX5HD2_FWD_BUS_CLK 133 +#define HIX5HD2_FWD_SYS_CLK 134 +#define HIX5HD2_MAC0_PHY_CLK 135 + +/* complex */ +#define HIX5HD2_MAC0_CLK 192 +#define HIX5HD2_MAC1_CLK 193 +#define HIX5HD2_SATA_CLK 194 +#define HIX5HD2_USB_CLK 195 #define HIX5HD2_NR_CLKS 256 #endif /* __DTS_HIX5HD2_CLOCK_H */ -- cgit v1.2.3 From cc855dd9994cfd179891cf5b966ebc8051d95a9f Mon Sep 17 00:00:00 2001 From: Jiancheng Xue Date: Wed, 28 May 2014 11:35:32 +0800 Subject: clk: hix5hd2: add sd clk Signed-off-by: Jiancheng Xue Signed-off-by: Zhangfei Gao Signed-off-by: Wei Xu --- drivers/clk/hisilicon/clk-hix5hd2.c | 21 +++++++++++++++------ include/dt-bindings/clock/hix5hd2-clock.h | 4 ++++ 2 files changed, 19 insertions(+), 6 deletions(-) (limited to 'include/dt-bindings') diff --git a/drivers/clk/hisilicon/clk-hix5hd2.c b/drivers/clk/hisilicon/clk-hix5hd2.c index da9ca05e6fb7..13d6ec24af12 100644 --- a/drivers/clk/hisilicon/clk-hix5hd2.c +++ b/drivers/clk/hisilicon/clk-hix5hd2.c @@ -50,9 +50,9 @@ static const char *sfc_mux_p[] __initconst = { "24m", "150m", "200m", "100m", "75m", }; static u32 sfc_mux_table[] = {0, 4, 5, 6, 7}; -static const char *sdio1_mux_p[] __initconst = { +static const char *sdio_mux_p[] __initconst = { "75m", "100m", "50m", "15m", }; -static u32 sdio1_mux_table[] = {0, 1, 2, 3}; +static u32 sdio_mux_table[] = {0, 1, 2, 3}; static const char *fephy_mux_p[] __initconst = { "25m", "125m"}; static u32 fephy_mux_table[] = {0, 1}; @@ -61,20 +61,29 @@ static u32 fephy_mux_table[] = {0, 1}; static struct hisi_mux_clock hix5hd2_mux_clks[] __initdata = { { HIX5HD2_SFC_MUX, "sfc_mux", sfc_mux_p, ARRAY_SIZE(sfc_mux_p), CLK_SET_RATE_PARENT, 0x5c, 8, 3, 0, sfc_mux_table, }, - { HIX5HD2_MMC_MUX, "mmc_mux", sdio1_mux_p, ARRAY_SIZE(sdio1_mux_p), - CLK_SET_RATE_PARENT, 0xa0, 8, 2, 0, sdio1_mux_table, }, + { HIX5HD2_MMC_MUX, "mmc_mux", sdio_mux_p, ARRAY_SIZE(sdio_mux_p), + CLK_SET_RATE_PARENT, 0xa0, 8, 2, 0, sdio_mux_table, }, + { HIX5HD2_SD_MUX, "sd_mux", sdio_mux_p, ARRAY_SIZE(sdio_mux_p), + CLK_SET_RATE_PARENT, 0x9c, 8, 2, 0, sdio_mux_table, }, { HIX5HD2_FEPHY_MUX, "fephy_mux", fephy_mux_p, ARRAY_SIZE(fephy_mux_p), CLK_SET_RATE_PARENT, 0x120, 8, 2, 0, fephy_mux_table, }, }; static struct hisi_gate_clock hix5hd2_gate_clks[] __initdata = { - /*sfc*/ + /* sfc */ { HIX5HD2_SFC_CLK, "clk_sfc", "sfc_mux", CLK_SET_RATE_PARENT, 0x5c, 0, 0, }, { HIX5HD2_SFC_RST, "rst_sfc", "clk_sfc", CLK_SET_RATE_PARENT, 0x5c, 4, CLK_GATE_SET_TO_DISABLE, }, - /*sdio1*/ + /* sdio0 */ + { HIX5HD2_SD_BIU_CLK, "clk_sd_biu", "200m", + CLK_SET_RATE_PARENT, 0x9c, 0, 0, }, + { HIX5HD2_SD_CIU_CLK, "clk_sd_ciu", "sd_mux", + CLK_SET_RATE_PARENT, 0x9c, 1, 0, }, + { HIX5HD2_SD_CIU_RST, "rst_sd_ciu", "clk_sd_ciu", + CLK_SET_RATE_PARENT, 0x9c, 4, CLK_GATE_SET_TO_DISABLE, }, + /* sdio1 */ { HIX5HD2_MMC_BIU_CLK, "clk_mmc_biu", "200m", CLK_SET_RATE_PARENT, 0xa0, 0, 0, }, { HIX5HD2_MMC_CIU_CLK, "clk_mmc_ciu", "mmc_mux", diff --git a/include/dt-bindings/clock/hix5hd2-clock.h b/include/dt-bindings/clock/hix5hd2-clock.h index e3286695382d..5bd4135c9544 100644 --- a/include/dt-bindings/clock/hix5hd2-clock.h +++ b/include/dt-bindings/clock/hix5hd2-clock.h @@ -46,6 +46,7 @@ #define HIX5HD2_SFC_MUX 64 #define HIX5HD2_MMC_MUX 65 #define HIX5HD2_FEPHY_MUX 66 +#define HIX5HD2_SD_MUX 67 /* gate clocks */ #define HIX5HD2_SFC_RST 128 @@ -56,6 +57,9 @@ #define HIX5HD2_FWD_BUS_CLK 133 #define HIX5HD2_FWD_SYS_CLK 134 #define HIX5HD2_MAC0_PHY_CLK 135 +#define HIX5HD2_SD_CIU_CLK 136 +#define HIX5HD2_SD_BIU_CLK 137 +#define HIX5HD2_SD_CIU_RST 138 /* complex */ #define HIX5HD2_MAC0_CLK 192 -- cgit v1.2.3 From 1463fba39c2e95803147e1d6e159ea402d965e6f Mon Sep 17 00:00:00 2001 From: Guoxiong Yan Date: Tue, 17 Jun 2014 17:04:17 +0800 Subject: clk: hix5hd2: add watchdog0 clocks hix5hd2 add watchdog0 clocks Signed-off-by: Guoxiong Yan Signed-off-by: Zhangfei Gao Signed-off-by: Wei Xu --- drivers/clk/hisilicon/clk-hix5hd2.c | 5 +++++ include/dt-bindings/clock/hix5hd2-clock.h | 2 ++ 2 files changed, 7 insertions(+) (limited to 'include/dt-bindings') diff --git a/drivers/clk/hisilicon/clk-hix5hd2.c b/drivers/clk/hisilicon/clk-hix5hd2.c index 13d6ec24af12..6e97e54b869c 100644 --- a/drivers/clk/hisilicon/clk-hix5hd2.c +++ b/drivers/clk/hisilicon/clk-hix5hd2.c @@ -95,6 +95,11 @@ static struct hisi_gate_clock hix5hd2_gate_clks[] __initdata = { { HIX5HD2_FWD_SYS_CLK, "clk_fwd_sys", "clk_fwd_bus", 0, 0xcc, 5, 0, }, { HIX5HD2_MAC0_PHY_CLK, "clk_fephy", "clk_fwd_sys", CLK_SET_RATE_PARENT, 0x120, 0, 0, }, + /* wdg0 */ + { HIX5HD2_WDG0_CLK, "clk_wdg0", "24m", + CLK_SET_RATE_PARENT, 0x178, 0, 0, }, + { HIX5HD2_WDG0_RST, "rst_wdg0", "clk_wdg0", + CLK_SET_RATE_PARENT, 0x178, 4, CLK_GATE_SET_TO_DISABLE, }, }; enum hix5hd2_clk_type { diff --git a/include/dt-bindings/clock/hix5hd2-clock.h b/include/dt-bindings/clock/hix5hd2-clock.h index 5bd4135c9544..b8e3c9deda20 100644 --- a/include/dt-bindings/clock/hix5hd2-clock.h +++ b/include/dt-bindings/clock/hix5hd2-clock.h @@ -60,6 +60,8 @@ #define HIX5HD2_SD_CIU_CLK 136 #define HIX5HD2_SD_BIU_CLK 137 #define HIX5HD2_SD_CIU_RST 138 +#define HIX5HD2_WDG0_CLK 139 +#define HIX5HD2_WDG0_RST 140 /* complex */ #define HIX5HD2_MAC0_CLK 192 -- cgit v1.2.3 From 45bcf9c6f299ae77c14c2ae8cea3f8e540fe80d1 Mon Sep 17 00:00:00 2001 From: Wei Yan Date: Thu, 7 Aug 2014 09:09:13 +0800 Subject: clk: hix5hd2: add I2C clocks hix5hd2 add I2C clocks (I2C0~i2C5) Signed-off-by: Wei Yan Signed-off-by: Zhangfei Gao Signed-off-by: Wei Xu --- drivers/clk/hisilicon/clk-hix5hd2.c | 25 +++++++++++++++++++++++++ include/dt-bindings/clock/hix5hd2-clock.h | 12 ++++++++++++ 2 files changed, 37 insertions(+) (limited to 'include/dt-bindings') diff --git a/drivers/clk/hisilicon/clk-hix5hd2.c b/drivers/clk/hisilicon/clk-hix5hd2.c index 6e97e54b869c..3f369c60fe56 100644 --- a/drivers/clk/hisilicon/clk-hix5hd2.c +++ b/drivers/clk/hisilicon/clk-hix5hd2.c @@ -100,6 +100,31 @@ static struct hisi_gate_clock hix5hd2_gate_clks[] __initdata = { CLK_SET_RATE_PARENT, 0x178, 0, 0, }, { HIX5HD2_WDG0_RST, "rst_wdg0", "clk_wdg0", CLK_SET_RATE_PARENT, 0x178, 4, CLK_GATE_SET_TO_DISABLE, }, + /* I2C */ + {HIX5HD2_I2C0_CLK, "clk_i2c0", "100m", + CLK_SET_RATE_PARENT, 0x06c, 4, 0, }, + {HIX5HD2_I2C0_RST, "rst_i2c0", "clk_i2c0", + CLK_SET_RATE_PARENT, 0x06c, 5, CLK_GATE_SET_TO_DISABLE, }, + {HIX5HD2_I2C1_CLK, "clk_i2c1", "100m", + CLK_SET_RATE_PARENT, 0x06c, 8, 0, }, + {HIX5HD2_I2C1_RST, "rst_i2c1", "clk_i2c1", + CLK_SET_RATE_PARENT, 0x06c, 9, CLK_GATE_SET_TO_DISABLE, }, + {HIX5HD2_I2C2_CLK, "clk_i2c2", "100m", + CLK_SET_RATE_PARENT, 0x06c, 12, 0, }, + {HIX5HD2_I2C2_RST, "rst_i2c2", "clk_i2c2", + CLK_SET_RATE_PARENT, 0x06c, 13, CLK_GATE_SET_TO_DISABLE, }, + {HIX5HD2_I2C3_CLK, "clk_i2c3", "100m", + CLK_SET_RATE_PARENT, 0x06c, 16, 0, }, + {HIX5HD2_I2C3_RST, "rst_i2c3", "clk_i2c3", + CLK_SET_RATE_PARENT, 0x06c, 17, CLK_GATE_SET_TO_DISABLE, }, + {HIX5HD2_I2C4_CLK, "clk_i2c4", "100m", + CLK_SET_RATE_PARENT, 0x06c, 20, 0, }, + {HIX5HD2_I2C4_RST, "rst_i2c4", "clk_i2c4", + CLK_SET_RATE_PARENT, 0x06c, 21, CLK_GATE_SET_TO_DISABLE, }, + {HIX5HD2_I2C5_CLK, "clk_i2c5", "100m", + CLK_SET_RATE_PARENT, 0x06c, 0, 0, }, + {HIX5HD2_I2C5_RST, "rst_i2c5", "clk_i2c5", + CLK_SET_RATE_PARENT, 0x06c, 1, CLK_GATE_SET_TO_DISABLE, }, }; enum hix5hd2_clk_type { diff --git a/include/dt-bindings/clock/hix5hd2-clock.h b/include/dt-bindings/clock/hix5hd2-clock.h index b8e3c9deda20..fd29c174ba63 100644 --- a/include/dt-bindings/clock/hix5hd2-clock.h +++ b/include/dt-bindings/clock/hix5hd2-clock.h @@ -62,6 +62,18 @@ #define HIX5HD2_SD_CIU_RST 138 #define HIX5HD2_WDG0_CLK 139 #define HIX5HD2_WDG0_RST 140 +#define HIX5HD2_I2C0_CLK 141 +#define HIX5HD2_I2C0_RST 142 +#define HIX5HD2_I2C1_CLK 143 +#define HIX5HD2_I2C1_RST 144 +#define HIX5HD2_I2C2_CLK 145 +#define HIX5HD2_I2C2_RST 146 +#define HIX5HD2_I2C3_CLK 147 +#define HIX5HD2_I2C3_RST 148 +#define HIX5HD2_I2C4_CLK 149 +#define HIX5HD2_I2C4_RST 150 +#define HIX5HD2_I2C5_CLK 151 +#define HIX5HD2_I2C5_RST 152 /* complex */ #define HIX5HD2_MAC0_CLK 192 -- cgit v1.2.3