From 96a3be43261b919a1785d080b501fae26ce97bc2 Mon Sep 17 00:00:00 2001 From: Niklas Cassel Date: Wed, 28 Mar 2018 13:50:16 +0200 Subject: PCI: designware-ep: Make dw_pcie_ep_reset_bar() handle 64-bit BARs properly Since a 64-bit BAR consists of a BAR pair, we need to write to both BARs in the BAR pair to clear the BAR properly. Signed-off-by: Niklas Cassel Signed-off-by: Lorenzo Pieralisi Reviewed-by: Gustavo Pimentel Acked-by: Kishon Vijay Abraham I --- drivers/pci/dwc/pcie-designware-ep.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'drivers/pci/dwc/pcie-designware-ep.c') diff --git a/drivers/pci/dwc/pcie-designware-ep.c b/drivers/pci/dwc/pcie-designware-ep.c index c9bdb5f139b4..9164c9084b4e 100644 --- a/drivers/pci/dwc/pcie-designware-ep.c +++ b/drivers/pci/dwc/pcie-designware-ep.c @@ -28,6 +28,10 @@ static void __dw_pcie_ep_reset_bar(struct dw_pcie *pci, enum pci_barno bar, dw_pcie_dbi_ro_wr_en(pci); dw_pcie_writel_dbi2(pci, reg, 0x0); dw_pcie_writel_dbi(pci, reg, 0x0); + if (flags & PCI_BASE_ADDRESS_MEM_TYPE_64) { + dw_pcie_writel_dbi2(pci, reg + 4, 0x0); + dw_pcie_writel_dbi(pci, reg + 4, 0x0); + } dw_pcie_dbi_ro_wr_dis(pci); } -- cgit v1.2.3