Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2017-03-20 | clk: tegra: Add CEC clock | Peter De Schrijver | 1 | -1/+1 |
2015-04-10 | clk: tegra: Use the proper parent for plld_dsi | Thierry Reding | 1 | -1/+1 |
2015-02-02 | clk: tegra: Define PLLD_DSI and remove dsia(b)_mux | Mark Zhang | 1 | -3/+3 |
2015-02-02 | clk: tegra: split Tegra124 clock header file | Paul Walmsley | 1 | -0/+345 |