drm/drm-misc - Kernel DRM miscellaneous fixes and cross-tree changes

Age	Commit message (Collapse)	Author	Files	Lines
2018-04-16	clk: renesas: Add r8a77470 CPG Core Clock Definitions	Biju Das	1	-0/+36
	Add all RZ/G1C Clock Pulse Generator Core Clock Outputs, as listed in Table 7.2 ("List of Clocks [RZ/G1C]") of the RZ/G1C Hardware User's Manual. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> [geert: Use consecutive numbering] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>