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path: root/drivers/clk
AgeCommit message (Expand)AuthorFilesLines
2014-07-15clk: qcom: mdp_lut_clk is a child of mdp_srcStephen Boyd1-1/+1
2014-07-15clk: qcom: Fix PLL rate configurationsStephen Boyd3-17/+38
2014-07-15clk: qcom: Fix MN frequency tables, parent map, and jpegdStephen Boyd1-40/+42
2014-07-15clk: qcom: Support bypass RCG configurationStephen Boyd3-14/+47
2014-07-15clk: qcom: Add support for IPQ8064's global clock controller (GCC)Kumar Gala3-0/+2433
2014-07-15clk: qcom: Add APQ8084 Multimedia Clock Controller (MMCC) supportGeorgi Djakov3-0/+3362
2014-07-15clk: sunxi: sun6i-a31-apb0-gates: Add A23 APB0 supportChen-Yu Tsai1-0/+5
2014-07-15clk: sunxi: sun6i-apb0-gates: use bitmaps for valid gate indicesChen-Yu Tsai1-36/+39
2014-07-13Merge tag 'clk-fixes-for-linus' of git://git.linaro.org/people/mike.turquette...Linus Torvalds12-67/+93
2014-07-13clk: rockchip: add clock controller for rk3288Heiko Stübner3-0/+727
2014-07-13clk: rockchip: add clock driver for rk3188 and rk3066 clocksHeiko Stübner2-0/+674
2014-07-13clk: rockchip: add reset controllerHeiko Stübner3-0/+133
2014-07-13clk: rockchip: add clock type for pll clocks and pll used on rk3066Heiko Stübner4-0/+541
2014-07-13clk: rockchip: add basic infrastructure for clock branchesHeiko Stübner3-0/+460
2014-07-13clk: composite: improve rate_hw sanity check logicMike Turquette1-10/+16
2014-07-13clk: composite: allow read-only clocksHeiko Stübner1-6/+3
2014-07-13clk: composite: support determine_rate using rate_ops->round_rate + mux_ops->...Boris BREZILLON1-1/+47
2014-07-13Merge branch 'clk-fixes' into clk-nextMike Turquette1-5/+11
2014-07-13clk: spear3xx: Set proper clock parent of uart1/2Thomas Gleixner1-4/+10
2014-07-13clk: spear3xx: Use proper control register offsetThomas Gleixner1-1/+1
2014-07-11clk: qcom: Add APQ8084 clocks for SATA, PCIe and UFSGeorgi Djakov1-0/+667
2014-07-11clk: qcom: Add APQ8084 Global Clock Controller supportGeorgi Djakov3-0/+2953
2014-07-11clk: qcom: Fully support apq8064 global clock controlStephen Boyd1-4/+569
2014-07-11clk: qcom: add clocks necessary for apq8064 sdccSrinivas Kandagatla1-0/+12
2014-07-11ARM: SPEAr13xx: Fix pcie clock namePratyush Anand2-4/+4
2014-07-11clk: exynos5420: Add IDs for clocks used in PD mfcArun Kumar K1-2/+4
2014-07-08Merge tag 'tegra-clk-3.17-1' of git://nv-tegra.nvidia.com/user/pdeschrijver/l...Mike Turquette5-4/+66
2014-07-08clk: tegra: Use XUSB-compatible SATA PLL sequenceMikko Perttunen1-0/+11
2014-07-07clk: sunxi: Fix gate indexing for sun6i-a31-apb0-gatesChen-Yu Tsai1-1/+5
2014-07-07clk: sunxi: Add A23 APB0 divider clock supportChen-Yu Tsai2-1/+71
2014-07-04clk: sunxi: Add A23 clocks supportChen-Yu Tsai1-0/+101
2014-07-04clk: sunxi: Add support for table-based divider clocksChen-Yu Tsai1-4/+5
2014-07-04clk: sunxi: Support factor clocks with N factor starting not from 0Chen-Yu Tsai2-1/+2
2014-07-04clk: sunxi: move "ahb_sdram" to protected clock listChen-Yu Tsai1-5/+3
2014-07-04clk: sunxi: register clock gates with clkdevChen-Yu Tsai1-0/+1
2014-07-03Merge branch 'clk-fixes' into clk-nextMike Turquette11-62/+82
2014-07-02clk: qcom: HDMI source sel is 3 not 2Stephen Boyd1-1/+1
2014-07-02clk: define and export clk_debugs_add_filePeter De Schrijver1-0/+12
2014-07-02Merge tag 'for_3.16/samsung-clk-fixes' of git://git.kernel.org/pub/scm/linux/...Mike Turquette5-47/+71
2014-07-02clk: s2mps11: Fix clk_opsKarol Wrona1-22/+11
2014-07-02clk: at91: main: warn when the main crystal frequency is not setAlexandre Belloni1-0/+1
2014-07-02CLK: ti: dra7: Initialize USB_DPLLRoger Quadros1-0/+11
2014-07-01Merge branch 'for-v3.16-rc/ti-clk-drv' of github.com:t-kristo/linux-pm into c...Mike Turquette2-6/+4
2014-07-01clk: sunxi: fix devm_ioremap_resource error detection codeHimangi Saraogi1-1/+1
2014-07-01clk: s2mps11: Fix double free corruption during driver unbindKrzysztof Kozlowski1-5/+2
2014-07-01clk: Add driver for Palmas clk32kg and clk32kgaudio clocksPeter Ujfalusi3-0/+315
2014-07-01clk: ti: am43x: Fix boot with CONFIG_SOC_AM33XX disabledRoger Quadros1-2/+3
2014-07-01clk: Fix build warningsSachin Kamat1-11/+11
2014-07-01clk: ppc-corenet: Fix Section mismatch warningJingchang Lu1-1/+1
2014-06-30clk: tegra: export clock names for debuggingPeter De Schrijver1-0/+6