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path: root/drivers/clk/st/clkgen-mux.c
AgeCommit message (Expand)AuthorFilesLines
2015-10-08drivers: clk: st: PLL rate change implementation for DVFSGabriel Fernandez1-0/+3
2015-08-24clk: Convert __clk_get_name(hw->clk) to clk_hw_get_name(hw)Stephen Boyd1-1/+1
2015-07-28Merge branch 'cleanup-clk-h-includes' into clk-nextStephen Boyd1-0/+1
2015-07-28clk: st: make use of of_clk_parent_fill helper functionDinh Nguyen1-5/+2
2015-07-20clk: st: Include clk.hStephen Boyd1-0/+1
2015-07-13clk: st: Fix error paths and allocation styleStephen Boyd1-38/+45
2015-07-06drivers: clk: st: Fix mux bit-setting for Cortex A9 clocksGabriel Fernandez1-1/+1
2015-07-06drivers: clk: st: Add CLK_GET_RATE_NOCACHE flag to clocksPankaj Dev1-3/+5
2015-06-04clk: st: Use of_clk_get_parent_count() instead of open codingGeert Uytterhoeven1-1/+1
2015-05-14clk: st: Silence sparse warningsStephen Boyd1-7/+7
2015-04-01clk: constify of_device_id arrayFabian Frederick1-4/+4
2015-02-18clk: Replace explicit clk assignment with __clk_hw_set_clkJavier Martinez Canillas1-7/+7
2014-07-28clk: st: Use round to closest divider flagGabriel FERNANDEZ1-1/+2
2014-07-28clk: st: STiH407: Support for A9 MUX ClocksGabriel FERNANDEZ1-0/+9
2014-03-25clk: st: Support for A9 MUX clocksGabriel FERNANDEZ1-0/+19
2014-03-25clk: st: Support for VCC-mux and MUX clocksGabriel FERNANDEZ1-0/+272
2014-03-25clk: st: Support for DIVMUX and PreDiv ClocksGabriel FERNANDEZ1-0/+529