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Kernel DRM miscellaneous fixes and cross-tree changes
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meson
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Author
Files
Lines
2016-10-07
Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/...
Linus Torvalds
1
-9
/
+9
2016-09-14
clk: gxbb: expose i2c clocks
Jerome Brunet
1
-2
/
+2
2016-09-14
clk: gxbb: expose USB clocks
Martin Blumenstingl
1
-5
/
+5
2016-09-14
clk: gxbb: expose spifc clock
Jerome Brunet
1
-1
/
+1
2016-09-14
clk: gxbb: expose MPLL2 clock for use by DT
Martin Blumenstingl
1
-1
/
+1
2016-09-14
clk: meson: fix CLKID_GCLK_VENCI_INT typo
Arnd Bergmann
1
-1
/
+1
2016-09-14
meson: clk: Use builtin_platform_driver to simplify the code
Wei Yongjun
1
-5
/
+1
2016-09-02
Merge branch 'clk-meson-gxbb' into clk-next
Michael Turquette
6
-119
/
+503
2016-09-02
clk: meson-gxbb: Export PWM related clocks for DT
Neil Armstrong
1
-3
/
+3
2016-09-01
meson: clk: Add support for clock gates
Alexander Müller
2
-0
/
+254
2016-09-01
gxbb: clk: Adjust MESON_GATE macro to be shared with meson8b
Alexander Müller
2
-85
/
+85
2016-09-01
clk: meson: Copy meson8b CLKID defines to private header file
Alexander Müller
2
-1
/
+107
2016-09-01
meson: clk: Rename register names according to Amlogic datasheet
Alexander Müller
2
-19
/
+18
2016-09-01
meson: clk: Move register definitions to meson8b.h
Alexander Müller
2
-16
/
+41
2016-09-01
clk: meson: Rename meson8b-clkc.c to reflect gxbb naming convention
Alexander Müller
2
-1
/
+1
2016-09-01
Merge remote-tracking branch 'clk/clk-meson-gxbb-ao' into clk-meson-gxbb
Michael Turquette
2
-1
/
+192
2016-08-24
Merge branch 'clk-meson-gxbb-ao' into clk-next
Stephen Boyd
1
-1
/
+1
2016-08-24
clk: meson: Fix invalid use of sizeof in gxbb_aoclkc_probe()
Wei Yongjun
1
-1
/
+1
2016-08-19
Merge branch 'clk-meson-gxbb-ao' into clk-next
Stephen Boyd
2
-1
/
+192
2016-08-19
clk: meson: Add GXBB AO Clock and Reset controller driver
Neil Armstrong
2
-1
/
+192
2016-08-15
Merge branch 'clk-meson-gxbb' into clk-next
Stephen Boyd
2
-2
/
+14
2016-08-15
clk: gxbb: add MMC gate clocks, and expose for DT
Kevin Hilman
2
-2
/
+14
2016-08-15
clk: gxbb: use builtin_platform_driver to simplify the code
Wei Yongjun
1
-5
/
+1
2016-07-15
Merge branch 'clk-s905' into clk-next
Michael Turquette
1
-1
/
+1
2016-07-15
Revert "clk: gxbb: expose CLKID_MMC_PCLK"
Michael Turquette
1
-1
/
+1
2016-07-07
Merge branch 'clk-s905' into clk-next
Michael Turquette
1
-1
/
+1
2016-07-07
clk: gxbb: expose CLKID_MMC_PCLK
Kevin Hilman
1
-1
/
+1
2016-07-06
clk: meson: make gxbb explicitly non-modular
Paul Gortmaker
1
-14
/
+4
2016-07-06
clk: meson8b: make it explicitly non-modular
Paul Gortmaker
1
-15
/
+4
2016-06-22
clk: gxbb: add AmLogic GXBB clk controller driver
Michael Turquette
4
-0
/
+1233
2016-06-22
clk: meson: fractional pll support
Michael Turquette
2
-2
/
+45
2016-06-22
clk: meson: add mpll support
Michael Turquette
3
-1
/
+105
2016-06-22
clk: meson: add peripheral gate macro
Michael Turquette
1
-0
/
+14
2016-06-22
clk: meson: only build selected platforms
Michael Turquette
2
-2
/
+14
2016-06-22
clk: meson8b: convert to platform_driver
Michael Turquette
1
-18
/
+49
2016-06-22
clk: meson8b: clean up composite clocks
Michael Turquette
4
-246
/
+66
2016-06-22
clk: meson8b: remove mali clk
Michael Turquette
1
-22
/
+0
2016-06-22
clk: meson8b: clean up cpu clocks
Michael Turquette
4
-90
/
+59
2016-06-22
clk: meson8b: clean up fixed factor clocks
Michael Turquette
3
-71
/
+60
2016-06-22
clk: meson8b: clean up pll clocks
Michael Turquette
4
-114
/
+131
2016-06-22
clk: meson8b: clean up fixed rate clocks
Michael Turquette
3
-75
/
+54
2016-06-22
clk: meson8b: rectify reg offsets with datasheet
Michael Turquette
1
-3
/
+12
2016-04-15
clk: meson: Remove CLK_IS_ROOT
Stephen Boyd
1
-3
/
+3
2016-02-08
clk: meson: Fix meson_clk_register_clks() signature type mismatch
Andreas Färber
1
-1
/
+1
2015-07-20
clk: meson8b: Properly include clk.h
Stephen Boyd
2
-1
/
+1
2015-06-12
clk: meson: add some error handling in meson_clk_register_cpu()
Dan Carpenter
1
-4
/
+12
2015-06-05
clk: meson8b: Add support for Meson8b clocks
Carlo Caione
2
-0
/
+197
2015-06-05
clk: meson: Add support for Meson clock controller
Carlo Caione
5
-0
/
+903