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path: root/drivers/bcma/driver_gpio.c
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2017-11-08gpio: Move irqdomain into struct gpio_irq_chipThierry Reding1-1/+1
In order to consolidate the multiple ways to associate an IRQ chip with a GPIO chip, move more fields into the new struct gpio_irq_chip. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-07-27bcma: gpio: Correct number of GPIOs for BCM53573Florian Fainelli1-0/+1
Broadcom BCM53573 SoCs actually have 32 GPIOs, and not 16. Fixes: 3f37ec79dd21 ("bcma: support BCM53573 series of wireless SoCs") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2017-03-08bcma: gpio: set of_node regardless of the host typeRafał Miłecki1-2/+1
DT allows describing many device types, not only platform ones. If e.g. bcma is hosted on PCI(e) and it has its of_node, let's pass it to the GPIO subsystem. This allows GPIO code to handle more hardware details not only for bcma on a SoC. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2016-02-16Merge tag 'wireless-drivers-next-for-davem-2016-02-12' of ↵David S. Miller1-0/+1
git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers-next Kalle Valo says: ==================== Major changes: wl12xx * add device tree support for SPI mwifiex * add debugfs file to read chip information * add MSIx support for newer pcie chipsets (8997 onwards) * add schedule scan support * add WoWLAN net-detect support * firmware dump support for w8997 chipset iwlwifi * continue the work on multiple Rx queues * add support for beacon storing used in low power states * use the regular firmware image of WoWLAN * fix 8000 devices for Big Endian machines * more firmware debug hooks * add support for P2P Client snoozing * make the beacon filtering for AP mode configurable * fix transmit queues overflow with LSO libertas * add support for setting power save via cfg80211 ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2016-02-06bcma: add support for BCM47094Rafał Miłecki1-0/+1
It's another SoC with 32 GPIOs and simplified watchdog handling. It was tested on D-Link DIR-885L. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2016-01-07bcma: gpio: use gpiochip data pointerLinus Walleij1-14/+9
This makes the driver use the data pointer added to the gpio_chip to store a pointer to the state container instead of relying on container_of(). Cc: Kalle Valo <kvalo@codeaurora.org> Cc: linux-wireless@vger.kernel.org Acked-by: Hauke Mehrtens <hauke@hauke-m.de> Acked-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-19gpio: change member .dev to .parentLinus Walleij1-1/+1
The name .dev in a struct is normally reserved for a struct device that is let us say a superclass to the thing described by the struct. struct gpio_chip stands out by confusingly using a struct device *dev to point to the parent device (such as a platform_device) that represents the hardware. As we want to give gpio_chip:s real devices, this is not working. We need to rename this member to parent. This was done by two coccinelle scripts, I guess it is possible to combine them into one, but I don't know such stuff. They look like this: @@ struct gpio_chip *var; @@ -var->dev +var->parent and: @@ struct gpio_chip var; @@ -var.dev +var.parent and: @@ struct bgpio_chip *var; @@ -var->gc.dev +var->gc.parent Plus a few instances of bgpio that I couldn't figure out how to teach Coccinelle to rewrite. This patch hits all over the place, but I *strongly* prefer this solution to any piecemal approaches that just exercise patch mechanics all over the place. It mainly hits drivers/gpio and drivers/pinctrl which is my own backyard anyway. Cc: Haavard Skinnemoen <hskinnemoen@gmail.com> Cc: Rafał Miłecki <zajec5@gmail.com> Cc: Richard Purdie <rpurdie@rpsys.net> Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com> Cc: Alek Du <alek.du@intel.com> Cc: Jaroslav Kysela <perex@perex.cz> Cc: Takashi Iwai <tiwai@suse.com> Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Jiri Kosina <jkosina@suse.cz> Acked-by: Hans-Christian Egtvedt <egtvedt@samfundet.no> Acked-by: Jacek Anaszewski <j.anaszewski@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-08-18bcma: switch GPIO portions to use GPIOLIB_IRQCHIPLinus Walleij1-62/+30
This switches the BCMA GPIO driver to use GPIOLIB_IRQCHIP to handle its interrupts instead of rolling its own copy of the irqdomain handling etc. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2015-05-09bcma: enable 32 GPIO pins for BCM4707Felix Fietkau1-0/+1
Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2015-05-09bcma: use absolute base for SoC GPIO pinsFelix Fietkau1-9/+10
On some BCM5301x ARM devices, user space still needs to control some system GPIO pins for which no driver exists. This is a lot easier to do with a predictable GPIO base. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2015-03-20bcma: gpio: use predictable base for all BCM47XX busesRafał Miłecki1-8/+15
Some BCM47XX SoC routers have LEDs connected to extra PCIe bcma buses. Handling them in arch code requires predictable GPIO numbers. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2015-03-03bcma: gpio: enable GPIO IRQ domain on BCM5301XRafał Miłecki1-2/+2
Just like on BCM47XX arch, BCM5301X also has ChipCommon with IRQ for GPIOs. Now we have interrupts working on BCM5301X we can finally make use of it. This has been successfully tested on 5 different devices (Buffalo, Luxul, Netgear). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
2014-11-11bcma: make it possible to specify a IRQ num in bcma_core_irq()Hauke Mehrtens1-2/+2
This moves bcma_core_irq() to main.c and add a extra parameter with a number so that we can return different irq number for devices with more than one. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-10-09Merge tag 'gpio-v3.18-1' of ↵Linus Torvalds1-1/+2
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio Pull GPIO changes from Linus Walleij: "This is the bulk of GPIO changes for the v3.18 development cycle: - Increase the default ARCH_NR_GPIO from 256 to 512. This was done to avoid having a custom <asm/gpio.h> header for the x86 architecture - GPIO is custom and complicated enough as it is already! We want to move to a radix to store the descriptors going forward, and finally get rid of this fixed array size altogether. - Endgame patching of the gpio_remove() semantics initiated by Abdoulaye Berthe. It is not accepted by the system that the removal of a GPIO chip fails during eg reboot or shutdown, and therefore the return value has now painfully been refactored away. For special cases like GPIO expanders on a hot-pluggable bus like USB, we may later add some gpiochip_try_remove() call, but for the cases we have now, return values are moot. - Some incremental refactoring of the gpiolib core and ACPI GPIO library for more descriptor usage. - Refactor the chained IRQ handler set-up method to handle also threaded, nested interrupts and set up the parent IRQ correctly. Switch STMPE and TC3589x drivers to use this registration method. - Add a .irq_not_threaded flag to the struct gpio_chip, so that also GPIO expanders that block but are still not using threaded IRQ handlers. - New drivers for the ARM64 X-Gene SoC GPIO controller. - The syscon GPIO driver has been improved to handle the "DSP GPIO" found on the TI Keystone 2 SoC:s. - ADNP driver switched to use gpiolib irqchip helpers. - Refactor the DWAPB driver to support being instantiated from and MFD cell (platform device). - Incremental feature improvement in the Zynq, MCP23S08, DWAPB, OMAP, Xilinx and Crystalcove drivers. - Various minor fixes" * tag 'gpio-v3.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (52 commits) gpio: pch: Build context save/restore only for PM pinctrl: abx500: get rid of unused variable gpio: ks8695: fix 'else should follow close brace '}'' gpio: stmpe: add verbose debug code gpio: stmpe: fix up interrupt enable logic gpio: staticize xway_stp_init() gpio: handle also nested irqchips in the chained handler set-up gpio: set parent irq on chained handlers gpiolib: irqchip: use irq_find_mapping while removing irqchip gpio: crystalcove: support virtual GPIO pinctrl: bcm281xx: make Kconfig dependency more strict gpio: kona: enable only on BCM_MOBILE or for compile testing gpio, bcm-kona, LLVMLinux: Remove use of __initconst gpio: Fix ngpio in gpio-xilinx driver gpio: dwapb: fix pointer to integer cast gpio: xgene: Remove unneeded #ifdef CONFIG_OF guard gpio: xgene: Remove unneeded forward declation for struct xgene_gpio gpio: xgene: Fix missing spin_lock_init() gpio: ks8695: fix switch case indentation gpiolib: add irq_not_threaded flag to gpio_chip ...
2014-09-30bcma: use chipcommon node from DT for SoC GPIO chipRafał Miłecki1-0/+4
This will allow us to define GPIO-attached devices (LEDs, buttons) in the the device tree. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-09-26bcma: gpio: use ChipCommon GPIO IRQ on BCM47XX arch onlyRafał Miłecki1-2/+2
GPIOs can be also used on bcm53xx, however this arch requires different implementation of IRQ support. It uses different IRQ number (117) and different masks & acking. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-09-18driver:gpio remove all usage of gpio_remove retval in driverabdoulaye berthe1-1/+2
this remove all reference to gpio_remove retval in all driver except pinctrl and gpio. the same thing is done for gpio and pinctrl in two different patches. Signed-off-by: Abdoulaye Berthe <berthe.ab@gmail.com> Acked-by: Michael Büsch <m@bues.ch> Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Acked-by: Mauro Carvalho Chehab <m.chehab@samsung.com> Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-06-19bcma: gpio: register all 32 GPIOs on BCM53572Rafał Miłecki1-0/+1
I've here a device detected as: bcma: bus0: Found chip with id 0xD144, rev 0x01 and package 0x08 I couldn't find GPIO handling hw button until trying GPIO 20. It seems BCM53572 also has 32 GPIOs. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-03-27bcma: gpio: register 32 GPIOs on BCM5357Rafał Miłecki1-1/+8
Some Broadcom boards have more GPIOs available. For example Linksys E3200 home router is based on SoC id 0x5357, package 0x0A and uses GPIO 23 to reset internal USB WiFi (gpio23=wombo_reset). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2014-01-24bcma: gpio: don't cast u32 to unsigned longRafał Miłecki1-2/+2
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6343/
2014-01-24bcma: prevent irq handler from firing when registeredHauke Mehrtens1-0/+3
With this patch we prevent the irq from being fired when it is registered. The Hardware fires an IRQ when input signal XOR polarity AND gpio mask is 1. Now we are setting polarity to a vlaue so that is is 0 when we register it. In addition we also set the irq mask register to 0 when the irq handler is initialized, so all gpio irqs are masked and there will be no unexpected irq. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Tested-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6304/
2014-01-23bcma: gpio: add own IRQ domainRafał Miłecki1-2/+132
Input GPIO changes can generate interrupts, but we need kind of ACK for them by changing IRQ polarity. This is required to stop hardware from keep generating interrupts and generate another one on the next GPIO state change. This code allows using GPIOs with standard interrupts and add for example GPIO buttons support. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6216/
2013-02-08Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller1-0/+5
Synchronize with 'net' in order to sort out some l2tp, wireless, and ipv6 GRE fixes that will be built on top of in 'net-next'. Signed-off-by: David S. Miller <davem@davemloft.net>
2013-02-04bcma: unregister gpios before unloading bcmaHauke Mehrtens1-0/+5
This patch unregisters the gpio chip before bcma gets unloaded. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Reported-by: Piotr Haber <phaber@broadcom.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-01-30bcma: add gpio_to_irqHauke Mehrtens1-0/+11
The old bcm47xx gpio code had support for gpio_to_irq, but the new code did not provide this function, but returned -ENXIO all the time. This patch adds the missing function. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-11-21bcma: add GPIO driverHauke Mehrtens1-0/+98
Register a GPIO driver to access the GPIOs provided by the chip. The GPIOs of the SoC should always start at 0 and the other GPIOs could start at a random position. There is just one SoC in a system and when they start at 0 the number is predictable. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Patchwork: http://patchwork.linux-mips.org/patch/4587 Acked-by: Florian Fainelli <florian@openwrt.org>
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