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path: root/arch/mips/mm/tlbex.c
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2009-03-11MIPS: NEC VR5500 processor support fixupShinya Kuribayashi1-0/+1
Current VR5500 processor support lacks of some functions which are expected to be configured/synthesized on arch initialization. Here're some VR5500A spec notes: * All execution hazards are handled in hardware. * Once VR5500A stops the operation of the pipeline by WAIT instruction, it could return from the standby mode only when either a reset, NMI request, or all enabled interrupts is/are detected. In other words, if interrupts are disabled by Status.IE=0, it keeps in standby mode even when interrupts are internally asserted. Notes on WAIT: The operation of the processor is undefined if WAIT insn is in the branch delay slot. The operation is also undefined if WAIT insn is executed when Status.EXL and Status.ERL are set to 1. * VR5500A core only implements the Load prefetch. With these changes, it boots fine. Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-01-11MIPS: Add Cavium OCTEON slot into proper tlb category.David Daney1-0/+1
Expand the case statement for build_tlb_write_entry so that it does the right thing on Cavium CPU variants. Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com> Signed-off-by: Paul Gortmaker <Paul.Gortmaker@windriver.com> Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-09-05[MIPS] Fix WARNING: at kernel/smp.c:290Thomas Bogendoerfer1-3/+3
trap_init issues flush_icache_range(), which uses ipi functions to get icache flushing done on all cpus. But this is done before interrupts are enabled and caused WARN_ON messages. This changeset introduces a new local_flush_icache_range() and uses it before interrupts (and additional CPUs) are enabled to avoid this problem. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-06-05[MIPS] R4700: Fix build_tlb_probe_entryThomas Bogendoerfer1-1/+2
Treat R4700 like R4600 in build_tlb_probe_entry. Without this fix kernel will lock up. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-04-01[MIPS] Add missing 4KEC TLB refill handlerThomas Bogendoerfer1-0/+1
Early 4KEc were MIPS32r1 and therefore need some love to get a TLB refill handler. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-03-12[MIPS] Fix loads of section missmatchesRalf Baechle1-35/+35
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-02-01[MIPS] Split the micro-assembler from tlbex.c.Thiemo Seufer1-959/+341
This patch moves the micro-assembler in a separate implementation, as it is useful for further run-time optimizations. The only change in behaviour is cutting down printk noise at kernel startup time. Checkpatch complains about macro parameters which aren't protected by parentheses. I believe this is a flaw in checkpatch, the paste operator used in those macros won't work with parenthesised parameters. Signed-off-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29[MIPS] Alchemy: Au1210/Au1250 CPU supportManuel Lauss1-0/+2
This patch adds IDs for new Au1200 variants: Au1210 and Au1250. They are essentially identical to the Au1200 except for the Au1210 which has a different SoC-ID in the PRId register [bits 31:24]. The Au1250 is a "Au1200 V0.2". Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29[MIPS] tlbex.c: cleanup debug codeFranck Bui-Huu1-57/+26
Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29[MIPS] tlbex.c: use __cacheline_aligned instead of __tlb_handler_align Franck Bui-Huu1-6/+3
Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29[MIPS] tlbex.c: cleanup include filesFranck Bui-Huu1-6/+0
Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29[MIPS] tlbex.c: Cleanup __init usages.Franck Bui-Huu1-49/+49
Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29[MIPS] R4000/R4400 daddiu erratum workaroundMaciej W. Rozycki1-12/+30
This complements the generic R4000/R4400 errata workaround code and adds bits for the daddiu problem. In most places it just modifies handwritten assembly code so that the assembler is allowed to use a temporary register as daddiu may now be treated as a macro that expands to a sequence of li and daddu. It is the AT register or, where AT is unavailable or used explicitly for another purpose, an explicitly-named register is selected, using the .set at=<reg> feature added recently to gas. This feature is only used if CONFIG_CPU_DADDI_WORKAROUNDS has been set, so if the workaround remains disabled, the required version of binutils stays unchanged. Similarly, daddiu instructions put in branch delay slots in noreorder fragments are now taken out of them and the assembler is allowed to reorder them itself as possible (which it does making the whole idea of scheduling them into delay slots manually questionable). Also in the very few places where such a simple conversion was not possible, a handcoded longer sequence is implemented. Other than that there are changes to code responsible for building the TLB fault and page clear/copy handlers to avoid daddiu as appropriate. These are only effective if the erratum is verified to be present at the run time. Finally there is a trivial update to __delay(), because it uses daddiu in a branch delay slot. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-01-29[MIPS] tlbex: Cleanup handling of R2 hazards in TLB handlers.Ralf Baechle1-8/+6
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-13[MIPS] Revert "[MIPS] tlbex.c: Cleanup __init usage."Ralf Baechle1-48/+48
This reverts commit aaf76a3245c02faba51c96b9a340c14d6bb0dcc0. As requested by ranck Bui-Huu <fbuihuu@gmail.com>. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] tlbex.c: Cleanup __init usage.Franck Bui-Huu1-48/+48
Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] checkfiles: Fix "need space after that ','" errors.Ralf Baechle1-47/+47
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] Allow hardwiring of the CPU type to a single type for optimization.Ralf Baechle1-5/+5
This saves a few k on systems which only ever ship with a single CPU type. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] tlbex: Size optimize code by declaring a few functions inline.Ralf Baechle1-4/+4
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] Add support for BCM47XX CPUs.Aurelien Jarno1-0/+2
Note that the BCM4710 does not support the wait instruction, this is not a mistake in the code. It originally comes from the OpenWrt patches. Cc: Michael Buesch <mb@bu3sch.de> Cc: Felix Fietkau <nbd@openwrt.org> Cc: Florian Schirmer <jolt@tuxbox.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-09-14[MIPS] Workaround for 4Kc machine check exceptionMaciej W. Rozycki1-1/+25
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-09-10[MIPS] TLB: Fix instruction bitmasksThiemo Seufer1-2/+2
Signed-Off-By: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10[MIPS] define Hit_Invalidate_I to Index_Invalidate_I for loongson2Fuxin Zhang1-3/+5
Signed-off-by: Fuxin Zhang <zhangfx@lemote.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-05-11[MIPS] tlbex: use __maybe_unusedDavid Rientjes1-18/+18
Replace function instances of __attribute__((unused)) with __maybe_unused. Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: David Rientjes <rientjes@google.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-11-30[MIPS] Load modules to CKSEG0 if CONFIG_BUILD_ELF64=nAtsushi Nemoto1-0/+55
This is a patch to load 64-bit modules to CKSEG0 so that can be compiled with -msym32 option. This makes each module ~10% smaller. * introduce MODULE_START and MODULE_END * custom module_alloc() * PGD for modules * change XTLB refill handler synthesizer * enable -msym32 for modules again (revert ca78b1a5c6a6e70e052d3ea253828e49b5d07c8a) New XTLB refill handler looks like this: 80000080 dmfc0 k0,C0_BADVADDR 80000084 bltz k0,800000e4 # goto l_module_alloc 80000088 lui k1,0x8046 # %high(pgd_current) 8000008c ld k1,24600(k1) # %low(pgd_current) 80000090 dsrl k0,k0,0x1b # l_vmalloc_done: 80000094 andi k0,k0,0x1ff8 80000098 daddu k1,k1,k0 8000009c dmfc0 k0,C0_BADVADDR 800000a0 ld k1,0(k1) 800000a4 dsrl k0,k0,0x12 800000a8 andi k0,k0,0xff8 800000ac daddu k1,k1,k0 800000b0 dmfc0 k0,C0_XCONTEXT 800000b4 ld k1,0(k1) 800000b8 andi k0,k0,0xff0 800000bc daddu k1,k1,k0 800000c0 ld k0,0(k1) 800000c4 ld k1,8(k1) 800000c8 dsrl k0,k0,0x6 800000cc mtc0 k0,C0_ENTRYLO0 800000d0 dsrl k1,k1,0x6 800000d4 mtc0 k1,C0_ENTRYL01 800000d8 nop 800000dc tlbwr 800000e0 eret 800000e4 dsll k1,k0,0x2 # l_module_alloc: 800000e8 bgez k1,80000008 # goto l_vmalloc 800000ec lui k1,0xc000 800000f0 dsubu k0,k0,k1 800000f4 lui k1,0x8046 # %high(module_pg_dir) 800000f8 beq zero,zero,80000000 800000fc nop 80000000 beq zero,zero,80000090 # goto l_vmalloc_done 80000004 daddiu k1,k1,0x4000 80000008 dsll32 k1,k1,0x0 # l_vmalloc: 8000000c dsubu k0,k0,k1 80000010 beq zero,zero,80000090 # goto l_vmalloc_done 80000014 lui k1,0x8046 # %high(swapper_pg_dir) Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-11-01[MIPS] 16K & 64K page size fixesRalf Baechle1-3/+10
Derived from Peter Watkins <treestem@gmail.com>'s work. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-03Attack of "the the"s in archMatt LaPlante1-1/+1
The patch below corrects multiple occurances of "the the" typos across several files, both in source comments and KConfig files. There is no actual code changed, only text. Note this only affects the /arch directory, and I believe I could find many more elsewhere. :) Signed-off-by: Adrian Bunk <bunk@stusta.de>
2006-07-13[MIPS] Print out TLB handler assembly for debugging.Thiemo Seufer1-88/+71
Small update, using pr_debug and pr_info. Signed-off-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-30Remove obsolete #include <linux/config.h>Jörn Engel1-1/+0
Signed-off-by: Jörn Engel <joern@wohnheim.fh-wedel.de> Signed-off-by: Adrian Bunk <bunk@stusta.de>
2006-06-01[MIPS] Treat R14000 like R10000.Kumba1-0/+1
Signed-off-by: Joshua Kinard <kumba@gentoo.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-01[MIPS] Fix detection and handling of the 74K processor.Chris Dearman1-0/+1
Nothing exciting; Linux just didn't know it yet so this is most adding a value to a case statement. Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-04-19[MIPS] MT: Improved multithreading support.Ralf Baechle1-20/+63
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-04-19[MIPS] Fix vectored interrupt support in TLB exception handler generator.Ralf Baechle1-2/+2
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-03-21[MIPS] Remove CONFIG_BUILD_ELF64.Ralf Baechle1-13/+0
This option is no longer usable with supported compilers. It will be replaced by usage of -msym32 in a separate patch. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-03-09[MIPS] Scatter a bunch of __init over tlbex.c.Ralf Baechle1-17/+17
Found by make buildcheck. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Add support for SB1A CPU.Andrew Isaacson1-0/+1
Signed-Off-By: Andy Isaacson <adi@broadcom.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29R4600 v2.0 needs a nop before tlbp.Thiemo Seufer1-0/+2
Signed-off-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Handle mtc0 - tlb write hazard for VR5432.Ralf Baechle1-0/+1
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Avoid SMP cacheflushes. This is a minor optimization of startup butRalf Baechle1-20/+10
will also avoid smp_call_function from doing stupid things when called from a CPU that is not yet marked online. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Philips PNX8550 support: MIPS32-like core with 2 Trimedias on it.Pete Popov1-0/+1
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Detect the 34K.Ralf Baechle1-0/+1
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Date: Fri Jul 8 20:10:17 2005 +0000Ralf Baechle1-1/+1
Those literals are long. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Avoid tlbw* hazards for the R4600/R4700/R5000.Maciej W. Rozycki1-1/+6
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Fix the diagnostic dump for the XTLB refill handler.Maciej W. Rozycki1-1/+8
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Fix a diagnostic message.Maciej W. Rozycki1-1/+1
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Optimize R3k TLB Load/Store/Modified handlers, by schedulingMaciej W. Rozycki1-40/+30
delay slots properly and avoiding an unnecessary jump to a jump. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Fill R3k load delay slots properly.Maciej W. Rozycki1-0/+3
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Only dump instructions actually emitted.Maciej W. Rozycki1-7/+7
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Handle _PAGE_DIRTY correctly for CONFIG_64BIT_PHYS_ADDR on 32bit CPUs.Thiemo Seufer1-23/+29
Signed-off-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Fix 64bit SMP TLB handler and stack frame handling, optimize 32bit SMPThiemo Seufer1-29/+21
TLB handlers a bit, match definitions in pgtable-{32,64}.h better. Signed-off-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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