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2013-01-12irqchip: Move ARM gic.h to include/linux/irqchip/arm-gic.hRob Herring2-3/+2
Now that we have GIC moved to drivers/irqchip and all GIC DT init for platforms using irqchip_init, move gic.h and update the remaining includes. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Russell King <linux@arm.linux.org.uk> Cc: Anton Vorontsov <avorontsov@mvista.com> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: David Brown <davidb@codeaurora.org> Cc: Daniel Walker <dwalker@fifo99.com> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Viresh Kumar <viresh.linux@gmail.com> Cc: Shiraz Hashim <shiraz.hashim@st.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Samuel Ortiz <sameo@linux.intel.com>
2013-01-12ARM: use common irqchip_init for GIC initRob Herring1-8/+2
Convert all GIC DT initialization over to use common irqchip_init function. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Kukjin Kim <kgene.kim@samsung.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: David Brown <davidb@codeaurora.org> Cc: Daniel Walker <dwalker@fifo99.com> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Viresh Kumar <viresh.linux@gmail.com> Cc: Shiraz Hashim <shiraz.hashim@st.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@linaro.org>
2013-01-12ARM: remove mach .handle_irq for GIC usersRob Herring2-5/+0
Now that the GIC initialization sets up the handle_arch_irq pointer, we can remove it for all machines and make it static. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Anton Vorontsov <avorontsov@mvista.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: David Brown <davidb@codeaurora.org> Cc: Daniel Walker <dwalker@fifo99.com> Cc: Bryan Huntsman <bryanh@codeaurora.org> Acked-by: Tony Lindgren <tony@atomide.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Shiraz Hashim <shiraz.hashim@st.com> Acked-by: Stephen Warren <swarren@nvidia.com> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Olof Johansson <olof@lixom.net> Acked-by: Arnd Bergmann <arnd@arndb.de>
2013-01-10ARM: GIC: remove direct use of gic_raise_softirqRob Herring1-2/+0
In preparation of moving gic code to drivers/irqchip, remove the direct platform dependencies on gic_raise_softirq. Move the setup of smp_cross_call into the gic code and use arch_send_wakeup_ipi_mask function to trigger wake-up IPIs. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: David Brown <davidb@codeaurora.org> Cc: Daniel Walker <dwalker@fifo99.com> Cc: Bryan Huntsman <bryanh@codeaurora.org> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Magnus Damm <magnus.damm@gmail.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Cc: Shiraz Hashim <shiraz.hashim@st.com> Acked-by: Stephen Warren <swarren@nvidia.com> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Linus Walleij <linus.walleij@linaro.org> Acked-by: Olof Johansson <olof@lixom.net>
2013-01-03ARM: drivers: remove __dev* attributes.Greg Kroah-Hartman2-6/+6
CONFIG_HOTPLUG is going away as an option. As a result, the __dev* markings need to be removed. This change removes the use of __devinit, __devexit_p, __devinitdata, and __devexit from these drivers. Based on patches originally written by Bill Pemberton, but redone by me in order to handle some of the coding style issues better, by hand. Cc: Bill Pemberton <wfp5p@virginia.edu> Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-12-17Merge tag 'tegra-for-3.8-fixes-for-rc1' of ↵Olof Johansson2-4/+2
git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into fixes ARM: tegra: fixes for 3.8 This branch contains a few miscellaneous fixes that have shown up in the last few weeks. By Sivaram Nair (2) and Hiroshi Doyu (1) via Stephen Warren * tag 'tegra-for-3.8-fixes-for-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: amba: tegra-ahb: Fix warning w/o PM_SLEEP ARM: tegra: fix comment in dsib clk set_parent ARM: tegra: select correct parent clk for pll_p Signed-off-by: Olof Johansson <olof@lixom.net>
2012-12-13Merge branch 'for-linus' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial Pull trivial branch from Jiri Kosina: "Usual stuff -- comment/printk typo fixes, documentation updates, dead code elimination." * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (39 commits) HOWTO: fix double words typo x86 mtrr: fix comment typo in mtrr_bp_init propagate name change to comments in kernel source doc: Update the name of profiling based on sysfs treewide: Fix typos in various drivers treewide: Fix typos in various Kconfig wireless: mwifiex: Fix typo in wireless/mwifiex driver messages: i2o: Fix typo in messages/i2o scripts/kernel-doc: check that non-void fcts describe their return value Kernel-doc: Convention: Use a "Return" section to describe return values radeon: Fix typo and copy/paste error in comments doc: Remove unnecessary declarations from Documentation/accounting/getdelays.c various: Fix spelling of "asynchronous" in comments. Fix misspellings of "whether" in comments. eisa: Fix spelling of "asynchronous". various: Fix spelling of "registered" in comments. doc: fix quite a few typos within Documentation target: iscsi: fix comment typos in target/iscsi drivers treewide: fix typo of "suport" in various comments and Kconfig treewide: fix typo of "suppport" in various comments ...
2012-12-13Merge tag 'multiplatform' of ↵Linus Torvalds10-446/+66
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC multiplatform conversion patches from Olof Johansson: "Here are more patches in the progression towards multiplatform, sparse irq conversions in particular. Tegra has a handful of cleanups and general groundwork, but is not quite there yet on full enablement. Platforms that are enabled through this branch are VT8500 and Zynq. Note that i.MX was converted in one of the earlier cleanup branches as well (before we started a separate topic for multiplatform). And both new platforms for this merge window, sunxi and bcm, were merged with multiplatform support enabled." Fix up conflicts mostly as per Olof. * tag 'multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (29 commits) ARM: zynq: Remove all unused mach headers ARM: zynq: add support for ARCH_MULTIPLATFORM ARM: zynq: make use of debug_ll_io_init() ARM: zynq: remove TTC early mapping ARM: tegra: move debug-macro.S to include/debug ARM: tegra: don't include iomap.h from debug-macro.S ARM: tegra: decouple uncompress.h and debug-macro.S ARM: tegra: simplify DEBUG_LL UART selection options ARM: tegra: select SPARSE_IRQ ARM: tegra: enhance timer.c to get IO address from device tree ARM: tegra: enhance timer.c to get IRQ info from device tree ARM: timer: fix checkpatch warnings ARM: tegra: add TWD to device tree ARM: tegra: define DT bindings for and instantiate RTC ARM: tegra: define DT bindings for and instantiate timer clocksource/mtu-nomadik: use apb_pclk clk: ux500: Register mtu apb_pclocks ARM: plat-nomadik: convert platforms to SPARSE_IRQ mfd/db8500-prcmu: use the irq_domain_add_simple() mfd/ab8500-core: use irq_domain_add_simple() ...
2012-12-03treewide: Fix typos in various KconfigMasanari Iida1-1/+1
Correct spelling typo within various Kconfig. Signed-off-by: Masanari Iida <standby24x7@gmail.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2012-11-26ARM: tegra: fix comment in dsib clk set_parentSivaram Nair1-3/+1
Since the clk framework has already taken necessary locks before calling into the arch clk ops code, no further locks are needed while setting the parent of dsib clk. This patch removes a comment that indicated otherwise, and yet did not take any locks. Signed-off-by: Sivaram Nair <sivaramn@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-26ARM: tegra: select correct parent clk for pll_pSivaram Nair1-1/+1
For Tegra30, pll_p clk's parent is wrongly specified as clk_m instead of pll_ref in the tegra30_clk_init_table and this is resulting in a boot-time warning. This patch fixes this by correcting the clk init table. Signed-off-by: Sivaram Nair <sivaramn@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-16ARM: tegra: move debug-macro.S to include/debugStephen Warren2-254/+0
Move Tegra's debug-macro.S over to the common debug macro directory. Move Tegra's debug UART selection menu into ARM's Kconfig.debug, so that all related options are selected in the same place. Tegra's uncompress.h is left in mach-tegra/include/mach; it will be removed whenever Tegra is converted to multi-platform. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-16ARM: tegra: don't include iomap.h from debug-macro.SStephen Warren2-5/+20
In order to move Tegra's debug-macro.S to a common location for single zImage, it must not rely on any machine-specific header files such as <mach/iomap.h>. Duplicate the few physical address definitions that debug-macro.S relies upon directly into the file. To avoid tegra_io_desc[] requiring shared knowledge of the UART mapping's virtual address, use a virtual address outside the ranges in tegra_io_desc[]. Call debug_ll_io_init() to propagate the mapping beyond the early pages tables. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-16ARM: tegra: decouple uncompress.h and debug-macro.SStephen Warren4-43/+134
Prior to this change, Tegra's debug-macro.S relied on uncompress.h having determined which UART to use, and whether it was safe to use the UART (i.e. is it not in reset, and is clocked). This determination was communicated from uncompress.h to debug-macro.S using a few bytes of Tegra's IRAM (an on-SoC RAM). This had the disadvantage that uncompress.h was a required part of the kernel boot process; booting a non-compressed kernel would not allow earlyprintk to operate. This change duplicates the UART selection and validation logic into debug-macro.S so that the reliance on uncompress.h is removed. This also helps out with single-zImage work, since there is currently no support for using any uncompress.h with single-zImage. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-16ARM: tegra: simplify DEBUG_LL UART selection optionsStephen Warren4-96/+15
Delete CONFIG_TEGRA_DEBUG_UART_AUTO_SCRATCH; it's not useful any more: * No upstream bootloader currently or will ever support this option. * CONFIG_TEGRA_DEBUG_UART_AUTO_ODMDATA is a much more direct alternative. Merge the fixed and automatic UART selection menus into a single choice for simplicity; now you either pick AUTO_ODMDATA or a single fixed UART, rather than potentially having an AUTO option override whatever fixed option was chosen. Remove TEGRA_DEBUG_UART_NONE; if you don't want a Tegra DEBUG_LL UART, simply don't turn on DEBUG_LL. NONE used to be the default option, so pick AUTO_ODMDATA as the new default. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-16ARM: tegra: select SPARSE_IRQStephen Warren2-182/+3
SPARSE_IRQ is required for single zImage support. With this enabled, we can delete <mach/irqs.h>. This requires removing one unnecessary include of that file, and hard-coding the PCIe IRQ into the PCIe driver. This is a hack that will be dealt with as part of converting the PCIe driver into a true DT-supporting driver. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-16ARM: tegra: enhance timer.c to get IO address from device treeStephen Warren1-4/+28
Modify Tegra's timer code to parse the IO address from device tree, hence removing the dependency on <mach/iomap.h>. This will allow the driver to be moved to drivers/clocksource/. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-16ARM: tegra: enhance timer.c to get IRQ info from device treeStephen Warren1-18/+23
Modify Tegra's timer code to parse the Tegra timer IRQ from device tree, and to instantiate the TWD from device tree, rather than relying on hard- coded values from <mach/irqs.h>. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-16ARM: timer: fix checkpatch warningsStephen Warren1-4/+3
This prevents checkpatch complaining when this file is moved in a later patch. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: retain L2 content over CPU suspend/resumeJoseph Lo6-3/+57
The L2 RAM is in different power domain from the CPU cluster. So the L2 content can be retained over CPU suspend/resume. To do that, we need to disable L2 after the MMU is disabled, and enable L2 before the MMU is enabled. But the L2 controller is in the same power domain with the CPU cluster. We need to restore it's settings and re-enable it after the power be resumed. Signed-off-by: Joseph Lo <josephl@nvidia.com> Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra30: cpuidle: add powered-down state for CPU0Joseph Lo6-4/+275
This is a power gating idle mode. It support power gating vdd_cpu rail after all cpu cores in "powered-down" status. For Tegra30, the CPU0 can enter this state only when all secondary CPU is offline. We need to take care and make sure whole secondary CPUs were offline and checking the CPU power gate status. After that, the CPU0 can go into "powered-down" state safely. Then shut off the CPU rail. Be aware of that, you may see the legacy power state "LP2" in the code which is exactly the same meaning of "CPU power down". Base on the work by: Scott Williams <scwilliams@nvidia.com> Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra30: flowctrl: add cpu_suspend_exter/exit functionJoseph Lo2-0/+55
The flow controller can help CPU to go into suspend mode (powered-down state). When CPU go into powered-down state, it needs some careful settings before getting into and after leaving. The enter and exit functions do that by configuring appropriate mode for flow controller. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra30: clocks: add CPU low-power function into tegra_cpu_car_opsJoseph Lo2-0/+145
Add suspend, resume and rail_off_ready API into tegra_cpu_car_ops. These functions were used for CPU powered-down state maintenance. One thing needs to notice the rail_off_ready API only availalbe for cpu_g cluster not cpu_lp cluster. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra30: common: enable csite clockJoseph Lo1-0/+1
Enable csite (debug and trace controller) clock at init to prevent it be disabled. And this also the necessary clock for CPU be brought up or resumed from a power-gating low power state. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra30: cpuidle: add powered-down state for secondary CPUsJoseph Lo8-0/+253
This supports power-gated idle on secondary CPUs for Tegra30. The secondary CPUs can go into powered-down state independently. When CPU goes into this state, it saves it's contexts and puts itself to flow controlled WFI state. After that, it will been power gated. Be aware of that, you may see the legacy power state "LP2" in the code which is exactly the same meaning of "CPU power down". Based on the work by: Scott Williams <scwilliams@nvidia.com> Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: cpuidle: add CPU resume functionJoseph Lo3-0/+67
The CPU suspending on Tegra means CPU power gating. We add a resume function for taking care the CPUs that resume from power gating status. This function was been hooked to the reset handler. We take care everything here before go into kernel. Be aware of that, you may see the legacy power status "LP2" in the code which is exactly the same meaning of "CPU power down". Based on the work by: Scott Williams <scwilliams@nvidia.com> Colin Cross <ccross@android.com> Gary King <gking@nvidia.com> Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: cpuidle: separate cpuidle driver for different chipsJoseph Lo5-34/+184
The different Tegra chips may have different CPU idle states and data. Individual CPU idle driver make it more easy to maintain. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: rename the file of "sleep-tXX" to "sleep-tegraXX"Joseph Lo3-2/+1
For the naming consistency under the mach-tegra, we re-name the file of "sleep-tXX" to "sleep-tegraXX" (e.g., sleep-t30 to sleep-tegra30). Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: cpuidle: replace LP3 with ARM_CPUIDLE_WFI_STATEJoseph Lo1-39/+3
The Tegra CPU idle LP3 state is doing ARM WFI only. So it's same with the common ARM_CPUIDLE_WFI_STATE. Using it to replace LP3 now. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: Add Tegra30 host1x clock supportThierry Reding1-2/+3
Setup the clock parents for the two display controllers and HDMI. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: Add AUXDATA for Tegra30 host1xThierry Reding1-0/+9
Add the OF_DEV_AUXDATA table entries required to associate the proper names with host1x and its children. In turn, this allows the devices to find the required clocks. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: Add Tegra20 host1x clock supportThierry Reding1-3/+8
Extend the pll_d frequency table with a few entries to support common HDMI and LVDS display modes and setup the clock parents for the two display controllers and HDMI. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: Add AUXDATA for Tegra20 host1xThierry Reding1-0/+9
Add the OF_DEV_AUXDATA table entries required to associate the proper names with host1x and its children. In turn, this allows the devices to find the required clocks. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: Tegra30 speedo-based process identificationDanny Huang4-2/+309
This patch adds speedo-based process identification support for Tegra30. Signed-off-by: Danny Huang <dahuang@nvidia.com> [swarren s/Tegra3/Tegra30/ in log print, s/T30/Tegra30/ in commit description] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: Add speedo-based process identificationDanny Huang4-8/+140
Detect CPU and core process ID by checking speedo corner tables. This can provide a more accurate process ID. Signed-off-by: Danny Huang <dahuang@nvidia.com> [swarren s/Tegra2/Tegra20/ in log print] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15ARM: tegra: flexible spare fuse read functionDanny Huang2-7/+14
Change the spare fuse base from a definition to a variable. It provides flexibilty to read spare fuse on different chip. Signed-off-by: Danny Huang <dahuang@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-14ARM: tegra: Implement 6395/1 for TegraPeter De Schrijver1-1/+1
This patch implements ARM linux patch 6395/1 for Tegra. See commit 1a8e41c "ARM: 6395/1: VExpress: Set bit 22 in the PL310 (cache controller) AuxCtlr register" for details. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> [swarren: added commit subject for referenced patch] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-13ARM: tegra: Add OF_DEV_AUXDATA for sflash driver in board dtLaxman Dewangan1-0/+2
Add OF_DEV_AUXDATA for sflash controller driver for Tegra20 board dt files. Set the parent clock of sflash controller to PLLP and configure clock to 20MHz. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-09ARM: tegra: enable data prefetch on L2Joseph Lo1-1/+1
Enable the data prefetch on L2. The bit28 in aux ctrl register. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
2012-11-05ARM: tegra: Add OF_DEV_AUXDATA for SLINK driver in board dtLaxman Dewangan2-0/+20
Add OF_DEV_AUXDATA for slink driver for Tegra20 and Tegra30 board dt files. Set the parent clock of slink controller to PLLP and configure clock to 100MHz. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05ARM: tegra: common: using OF api for L2 cache initJoseph Lo1-7/+4
Moving L2 cache init to DT support. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05ARM: tegra30: clocks: add AHB and APB clocksJoseph Lo4-0/+157
Adding the AHB and APB bus clock for Tegra30. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05ARM: tegra: set up wlan clocks for tegra dtWei Ni2-0/+8
Set up the wlan clock tree for Tegra20 and Tegra30. Signed-off-by: Wei Ni <wni@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05ARM: tegra: move irammap.h to mach-tegraStephen Warren4-5/+3
Nothing outside mach-tegra uses this file, so there's no need for it to be in <mach/>. Since uncompress.h and debug-macro.S remain in include/mach, they need to include "../../irammap.h" becaue of this change. Both these usages will be removed shortly, when Tegra's DEBUG_LL implementation is updated not to pass information through IRAM. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05ARM: tegra: move iomap.h to mach-tegraStephen Warren22-31/+22
Nothing outside mach-tegra uses this file, so there's no need for it to be in <mach/>. Since uncompress.h and debug-macro.S remain in include/mach, they need to include "../../iomap.h" becaue of this change. uncompress.h will soon be deleted in later multi-platform/single-zImage patches. debug-macro.S will need to continue to include this header using an explicit relative path, to avoid duplicating the physical->virtual address mapping that iomap.h dictates. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05ARM: tegra: remove <mach/dma.h>Stephen Warren2-57/+0
Remove includes of <mach/dma.h> from sound/soc; nothing from it is used. Remove include of <mach/dma.h> from mach-tegra/apbio.c; since the DMA transfers made by this file don't need flow-control with any peripheral, there's no need to set any slave ID. Once those changes are made, there are no remaining users of <mach/dma.h> so remove it. Drivers should get this information from device tree. This removal is necessary for single zImage. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2012-11-05ARM: tegra: move tegra-ahb.h out of arch/arm/mach-tegra/Stephen Warren1-19/+0
We wish to empty arch/arm/mach-tegra/include/mach/ as much as possible to enable single zImage. Move tegra-ahb.h to a more central location (suggested by Arnd, OK'd by Greg KH), and actually make tegra-ahb.c include the header to ensure client and provider agree on the prototype. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-05ARM: tegra: remove unnecessary includes of <mach/*.h>Stephen Warren10-17/+2
This should make it easier to delete or move <mach/*.h>; something that is useful for single-zImage. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-10-16ARM: tegra: add tegra_timer clockSivaram Nair2-0/+2
This undoes commit 20f4665 "ARM: tegra: remove tegra_timer from tegra_list_clks" by bringing back the tegra_timer clock. tegra_timer is indeed a clock (hidden by the PERIPH_CLK macro) which should be added to the tegra_list_clks. The above commit caused tegra_init_timer() failing to get the clk reference. Signed-off-by: Sivaram Nair <sivaramn@nvidia.com> [swarren: added the reverted commit's subject to this patch description] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-10-16ARM: tegra: rename tegra system timerSivaram Nair4-4/+4
The timer variable is renamed to avoid confusion and symbol name clash with the tegra_timer clock. Signed-off-by: Sivaram Nair <sivaramn@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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