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2015-03-11firmware: qcom: scm: Clean cold boot entry to export only the APILina Iyer1-18/+3
We dont need to export the SCM specific cold boot flags to the platform code. Export only a function to set the cold boot address. Signed-off-by: Lina Iyer <lina.iyer@linaro.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2015-03-11firmware: qcom: scm: Move the scm driver to drivers/firmwareKumar Gala5-380/+1
Architectural changes in the ARM Linux kernel tree mandate the eventual removal of the mach-* directories. Move the scm driver to drivers/firmware and the scm header to include/linux to support that removal. Signed-off-by: Kumar Gala <galak@codeaurora.org>
2015-03-11ARM: qcom: Prep scm code for move to drivers/firmwareKumar Gala3-90/+90
Add qcom prefix to functions, etc to create a unique name space for the scm code as it gets ready to move out of qcom specific mach dir. Signed-off-by: Kumar Gala <galak@codeaurora.org>
2015-03-11ARM: qcom: Cleanup scm interface to only export what is neededKumar Gala2-10/+4
Now that scom boot interface is merged we don't need export scm_call anymore. Some other minor cleanups related to boot interface to only export what is needed by scm_set_boot_addr(). Signed-off-by: Kumar Gala <galak@codeaurora.org>
2015-03-11ARM: qcom: Merge scm and scm boot code togetherKumar Gala6-67/+30
Put all scm related code into a single file as a first step in cleaning up the scm interface to just expose functional behavior insteam of making direct scm calls. Signed-off-by: Kumar Gala <galak@codeaurora.org>
2015-02-17Merge tag 'soc-for-linus' of ↵Linus Torvalds4-37/+65
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform changes from Olof Johansson: "New and updated SoC support. Also included are some cleanups where the platform maintainers hadn't separated cleanups from new developent in separate branches. Some of the larger things worth pointing out: - A large set of changes from Alexandre Belloni and Nicolas Ferre preparing at91 platforms for multiplatform and cleaning up quite a bit in the process. - Removal of CSR's "Marco" SoC platform that never made it out to the market. We love seeing these since it means the vendor published support before product was out, which is exactly what we want! New platforms this release are: - Conexant Digicolor (CX92755 SoC) - Hisilicon HiP01 SoC - CSR/sirf Atlas7 SoC - ST STiH418 SoC - Common code changes for Nvidia Tegra132 (64-bit SoC) We're seeing more and more platforms having a harder time labelling changes as cleanups vs new development -- which is a good sign that we've come quite far on the cleanup effort. So over time we might start combining the cleanup and new-development branches more" * tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (124 commits) ARM: at91/trivial: unify functions and machine names ARM: at91: remove at91_dt_initialize and machine init_early() ARM: at91: change board files into SoC files ARM: at91: remove at91_boot_soc ARM: at91: move alternative initial mapping to board-dt-sama5.c ARM: at91: merge all SOC_AT91SAM9xxx ARM: at91: at91rm9200: set idle and restart from rm9200_dt_device_init() ARM: digicolor: select syscon and timer ARM: zynq: Simplify SLCR initialization ARM: zynq: PM: Fixed simple typo. ARM: zynq: Setup default gpio number for Xilinx Zynq ARM: digicolor: add low level debug support ARM: initial support for Conexant Digicolor CX92755 SoC ARM: OMAP2+: Add dm816x hwmod support ARM: OMAP2+: Add clock domain support for dm816x ARM: OMAP2+: Add board-generic.c entry for ti81xx ARM: at91: pm: remove warning to remove SOC_AT91SAM9263 usage ARM: at91: remove unused mach/system_rev.h ARM: at91: stop using HAVE_AT91_DBGUx ARM: at91: fix ordering of SRAM and PM initialization ...
2015-02-10ARM: 8301/1: qcom: Use secondary_startup_arm()Stephen Boyd1-2/+2
On qcom platforms we always enter the kernel in ARM mode, regardless of the kernel being compiled for THUMB mode. Use secondary_startup_arm() to properly switch the mode to what the kernel expects if required. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2015-01-23ARM: qcom: Drop unnecessary selects from ARCH_QCOMStephen Boyd1-2/+0
We don't need to force gpiolib on everyone given that it isn't required to actually boot the device and the multiplatform Kconfig already selects ARCH_WANT_OPTIONAL_GPIOLIB. CLKSRC_OF is already selected by CONFIG_ARCH_MULTIPLATFORM too, so we can drop that here. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2015-01-23ARM: qcom: Fix SCM interface for big-endian kernelsStephen Boyd2-18/+20
The secure environment only runs in little-endian mode, so any buffers shared with the secure environment should have their contents converted to little-endian. We also mark such elements with __le32 to allow sparse to catch such problems. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2015-01-23ARM: qcom: scm: Clarify boot interfaceStephen Boyd2-3/+3
The secure world only knows about 32-bit wide physical addresses for the boot API. Clarify the kernel interface by explicitly stating a u32 instead of phys_addr_t which could be 32 or 64 bits depending on LPAE or not. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2015-01-22ARM: qcom: Add SCM warmboot flags for quad core targets.Lina Iyer1-0/+2
Quad core targets like APQ8074, APQ8064, APQ8084 need SCM support set up warm boot addresses in the Secure Monitor. Extend the SCM flags to support warmboot addresses for secondary cores. Signed-off-by: Lina Iyer <lina.iyer@linaro.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2015-01-19ARM: qcom: scm: Add logging of actual return code from scm callOlav Haugan1-0/+1
When an error occurs during an scm call the error returned is remapped so we lose the original error code. This means that when an error occurs we have no idea what actually failed within the secure environment. Add a logging statement that will log the actual error code from scm call allowing us to easily determine what caused the error to occur. Signed-off-by: Olav Haugan <ohaugan@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2015-01-19ARM: qcom: scm: Flush the command buffer only instead of the entire cacheVikram Mulukutla1-5/+12
scm_call flushes the entire cache before calling into the secure world. This is both a performance penalty as well as insufficient on SMP systems where the CPUs possess a write-back L1 cache. Flush only the command and response buffers instead, moving the responsibility of flushing any other cached buffer (being passed to the secure world) to callers. Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2015-01-19ARM: qcom: scm: Get cacheline size from CTRStephen Boyd1-6/+8
Instead of hardcoding the cacheline size as 32, get the cacheline size from the CTR register. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2015-01-19ARM: qcom: scm: Fix incorrect cache invalidationStephen Boyd1-8/+23
The cache invalidation in scm_call() correctly rounds down the start address to invalidate the beginning of the cacheline but doesn't properly round up the 'end' address to make it aligned. The last chunk of the buffer won't be invalidated when 'end' is not cacheline size aligned so make sure to invalidate the last few bytes in such situations. It also doesn't do anything about outer caches so make sure to invalidate and flush those as well. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2015-01-19ARM: qcom: Select ARCH_SUPPORTS_BIG_ENDIANStephen Boyd1-0/+1
We can run qcom platforms in big-endian mode. Select the option. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2014-08-21ARM: qcom: Add initial IPQ8064 SoC and AP148 device treesKumar Gala1-0/+2
Add basic IPQ8064 SoC include device tree and support for basic booting on the AP148 Reference board with support for UART, I2C, and SPI. Signed-off-by: Kumar Gala <galak@codeaurora.org>
2014-06-17ARM: use menuconfig for sub-arch menusRob Herring1-5/+1
The System Type menu is getting quite long with platforms and is inconsistent in handling of sub-arch specific options. Tidy up the menu by making platform options a menuconfig entry containing any platform specific config items. [arnd: change OMAP part according to suggestion from Tony Lindgren <tony@atomide.com>] Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-06-02Merge tag 'dt-for-3.16' of ↵Linus Torvalds1-1/+3
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc into next Pull ARM SoC devicetree updates from Olof Johansson: "As with previous release, this continues to be among the largest branches we merge, with lots of new contents. New things for this release are among other things: - DTSI contents for the new SoCs supported in 3.16 (see SoC pull request) - Qualcomm APQ8064 and APQ8084 SoCs and eval boards - Nvidia Jetson TK1 development board (Tegra T124-based) Two new SoCs that didn't need enough new platform code to stand out enough for me to notice when writing the SoC tag, but that adds new DT contents are: - TI DRA72 - Marvell Berlin 2Q" * tag 'dt-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (500 commits) ARM: dts: add secure firmware support for exynos5420-arndale-octa ARM: dts: add pmu sysreg node to exynos3250 ARM: dts: correct the usb phy node in exynos5800-peach-pi ARM: dts: correct the usb phy node in exynos5420-peach-pit ARM: dts: add dts files for exynos5410 and exynos5410-smdk5410 ARM: dts: add dts files for exynos3250 SoC ARM: dts: add mfc node for exynos5800 ARM: dts: add Vbus regulator for USB 3.0 on exynos5800-peach-pi ARM: dts: enable fimd for exynos5800-peach-pi ARM: dts: enable display controller for exynos5800-peach-pi ARM: dts: enable hdmi for exynos5800-peach-pi ARM: dts: add dts file for exynos5800-peach-pi board ARM: dts: add dts file for exynos5800 SoC ARM: dts: add dts file for exynos5260-xyref5260 board ARM: dts: add dts files for exynos5260 SoC ARM: dts: update watchdog node name in exynos5440 ARM: dts: use key code macros on Origen and Arndale boards ARM: dts: enable RTC and WDT nodes on Origen boards ARM: dts: qcom: Add APQ8084-MTP board support ARM: dts: qcom: Add APQ8084 SoC support ...
2014-05-29ARM: dts: qcom: Add APQ8084 SoC supportGeorgi Djakov1-0/+1
Add support for the Qualcomm Snapdragon 805 APQ8084 SoC. It is used on APQ8084-MTP and other boards. Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2014-05-29ARM: dts: qcom: Add initial APQ8064 SoC and IFC6410 board device treesKumar Gala1-1/+2
Add basic APQ8064 SoC include device tree and support for basic booting on the IFC6410 board. Also, keep dtb build list and qcom_dt_match in sorted order. Signed-off-by: Kumar Gala <galak@codeaurora.org>
2014-05-23Merge tag 'qcom-soc-for-3.16' of ↵Arnd Bergmann1-0/+2
git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom into next/soc Merge "Qualcomm ARM Based SoC Updates for v3.16" from Kumar Gala: * Enabling building pinctrl and AMBA bus support * Clean up debug UART selection * tag 'qcom-soc-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom: ARM: qcom: Select PINCTRL by default for ARCH_QCOM ARM: debug: qcom: make UART address selection configuration option ARM: qcom: Enable ARM_AMBA option for Qualcomm SOCs. Conflicts: arch/arm/Kconfig.debug arch/arm/mach-qcom/Kconfig Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-05-22ARM: qcom: Select PINCTRL by default for ARCH_QCOMAndy Gross1-0/+1
Add missing PINCTRL selection. This enables selection of pinctrollers for Qualcomm processors. Signed-off-by: Andy Gross <agross@codeaurora.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2014-05-22ARM: qcom: Enable ARM_AMBA option for Qualcomm SOCs.Srinivas Kandagatla1-0/+1
As some of the IPs on Qualcomm SOCs are based on ARM PrimeCell IPs. For example SDCC controller is PrimeCell MCI pl180. Adding this option will give flexibility to reuse the existing drivers as it is without major modifications. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2014-04-22ARM: qcom: clean-up unneeded kconfig selectsRob Herring1-2/+0
Multi-platform support implies all these options are already selected and individual platforms don't need to select them. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Kumar Gala <galak@codeaurora.org> Cc: David Brown <davidb@codeaurora.org> Cc: linux-arm-msm@vger.kernel.org
2014-02-11ARM: qcom: Add SMP support for KPSSv2Rohit Vaswani1-0/+123
Implement support for the Krait CPU release sequence when the CPUs are part of the second version of the Krait processor subsystem. Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2014-02-11ARM: qcom: Add SMP support for KPSSv1Rohit Vaswani2-3/+111
Implement support for the Krait CPU release sequence when the CPUs are part of the first version of the krait processor subsystem. Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2014-02-11ARM: qcom: Re-organize platsmp to make it extensibleRohit Vaswani2-67/+65
This makes it easy to add SMP support for new devices by keying on a device node for the release sequence. We add the enable-method property for the cpus property to specify that we want to use the gcc-msm8660 release sequence (which is going to look for the global clock controller device node to map some Scorpion specific power and control registers). We also remove the nr_cpus detection code as that is done generically in the DT CPU detection code. Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org> [sboyd: Port to CPU_METHOD_OF_DECLARE] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2014-02-06ARM: qcom: Rename various msm prefixed functions to qcomKumar Gala2-13/+13
As mach-qcom will support a number of different Qualcomm SoC platforms we replace the msm prefix on function names with qcom to be a bit more generic. Signed-off-by: Kumar Gala <galak@codeaurora.org>
2014-02-06ARM: qcom: Split Qualcomm support into legacy and multiplatformKumar Gala8-0/+600
Introduce a new mach-qcom that will support SoCs that intend to be multiplatform compatible while keeping mach-msm to legacy SoC/board support that will not transition over to multiplatform. As part of this, we move support for MSM8X60, MSM8960 and MSM8974 over to mach-qcom. Signed-off-by: Kumar Gala <galak@codeaurora.org>
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