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path: root/arch/arc/kernel/mcip.c
AgeCommit message (Expand)AuthorFilesLines
2023-08-17ARC: boot log: eliminate struct cpuinfo_arc #3: don't exportVineet Gupta1-2/+0
2021-08-12arc: Bulk conversion to generic_handle_domain_irq()Marc Zyngier1-1/+1
2019-08-26ARCv2: IDU-intc: Add support for edge-triggered interruptsMischa Jonker1-6/+54
2019-06-19treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500Thomas Gleixner1-4/+1
2018-02-28ARC: mcip: update MCIP debug mask when the new cpu came onlineEugeniy Paltsev1-5/+32
2018-02-28ARC: mcip: halt GFRC counter when ARC cores haltEugeniy Paltsev1-0/+37
2017-02-06ARCv2: IDU-intc: Delete deprecated parameters in Device TreesYuriy Kolerov1-16/+1
2017-02-06ARCv2: IDU-intc: mask all common interrupts by defaultYuriy Kolerov1-2/+10
2017-02-06ARCv2: IDU-intc: Use build registers for getting numbers of interruptsYuriy Kolerov1-10/+9
2017-01-24ARCv2: MCIP: update the BCR per current changesVineet Gupta1-2/+1
2017-01-24ARCv2: MCIP: Deprecate setting of affinity in Device TreeYuriy Kolerov1-30/+22
2017-01-04ARCv2: IRQ: Call entry/exit functions for chained handlers in MCIPYuriy Kolerov1-0/+4
2016-11-30ARC: move mcip.h into include/soc and adjust the includesVineet Gupta1-1/+1
2016-11-08ARCv2: MCIP: Use IDU_M_DISTRI_DEST mode if there is only 1 destination coreYuriy Kolerov1-2/+11
2016-11-08ARC: IRQ: Do not use hwirq as virq and vice versaYuriy Kolerov1-10/+9
2016-10-16ARCv2: intc: untangle SMP, MCIP and IDUVineet Gupta1-20/+11
2016-05-09ARC: irq: export some IRQs againVineet Gupta1-3/+0
2016-05-09ARC: clocksource: DT based probeVineet Gupta1-3/+1
2016-02-24arc: SMP: CONFIG_ARC_IPI_DBG cleanupValentin Rothberg1-5/+0
2016-02-24ARC: SMP: No need for CONFIG_ARC_IPI_DBGVineet Gupta1-8/+1
2016-02-24ARCv2: Elide sending new cross core intr if receiver didn't ack prevVineet Gupta1-17/+10
2016-02-24ARCv2: SMP: Push IPI_IRQ into IPI providerVineet Gupta1-0/+1
2016-02-24ARCv2: SMP: Emulate IPI to self using software triggered interruptVineet Gupta1-0/+15
2016-02-18ARCv2: boot print Low Latency MemoryVineet Gupta1-1/+2
2016-01-29ARCv2: clocksource: Rename GRTC -> GFRC ...Vineet Gupta1-5/+5
2015-12-17ARC: rename smp operation init_irq_cpu() to init_per_cpu()Noam Camus1-1/+1
2015-10-28ARCv2: smp: [plat-*]: No need to explicitly call mcip_init_smp()Vineet Gupta1-8/+2
2015-10-28ARCv2: smp: [plat-*]: No need to explicitly call mcip_init_early_smp()Vineet Gupta1-7/+8
2015-10-17ARC: smp: Move default boot kick/wait code out of MCIP into common codeVineet Gupta1-18/+0
2015-10-17ARC: boot log: move helper macros to header for reuseVineet Gupta1-2/+1
2015-09-16genirq: Remove irq argument from irq flow handlersThomas Gleixner1-1/+1
2015-07-31arc/irq: Prepare idu_cascade_isr for irq argument removalThomas Gleixner1-1/+2
2015-07-09arc:irqchip: prepare for drivers/irqchip/irqchip.h removalJoël Porquet1-1/+0
2015-07-06ARCv2: intc: IDU: Fix potential race in installing a chained IRQ handlerVineet Gupta1-2/+1
2015-07-06ARCv2: intc: IDU: support irq affinityVineet Gupta1-1/+18
2015-06-22ARCv2: SMP: intc: IDU 2nd level intc for dynamic IRQ distributionVineet Gupta1-1/+182
2015-06-22ARCv2: SMP: clocksource: Enable Global Real Time counterVineet Gupta1-0/+3
2015-06-22ARCv2: SMP: ARConnect debug/robustnessVineet Gupta1-4/+44
2015-06-22ARCv2: SMP: Support ARConnect (MCIP) for Inter-Core-Interrupts et alVineet Gupta1-0/+117
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