diff options
Diffstat (limited to 'sound')
| -rw-r--r-- | sound/soc/intel/common/sst-dsp-priv.h | 4 | ||||
| -rw-r--r-- | sound/soc/intel/skylake/bxt-sst.c | 4 | ||||
| -rw-r--r-- | sound/soc/intel/skylake/skl-sst.c | 5 |
3 files changed, 13 insertions, 0 deletions
diff --git a/sound/soc/intel/common/sst-dsp-priv.h b/sound/soc/intel/common/sst-dsp-priv.h index d13c84364c3c..8734040d64d3 100644 --- a/sound/soc/intel/common/sst-dsp-priv.h +++ b/sound/soc/intel/common/sst-dsp-priv.h @@ -77,6 +77,10 @@ struct sst_addr { u32 dram_offset; u32 dsp_iram_offset; u32 dsp_dram_offset; + u32 sram0_base; + u32 sram1_base; + u32 w0_stat_sz; + u32 w0_up_sz; void __iomem *lpe; void __iomem *shim; void __iomem *pci_cfg; diff --git a/sound/soc/intel/skylake/bxt-sst.c b/sound/soc/intel/skylake/bxt-sst.c index f5e7dbb1ba39..cf11b84888b9 100644 --- a/sound/soc/intel/skylake/bxt-sst.c +++ b/sound/soc/intel/skylake/bxt-sst.c @@ -573,6 +573,10 @@ int bxt_sst_dsp_init(struct device *dev, void __iomem *mmio_base, int irq, sst->fw_ops = bxt_fw_ops; sst->addr.lpe = mmio_base; sst->addr.shim = mmio_base; + sst->addr.sram0_base = BXT_ADSP_SRAM0_BASE; + sst->addr.sram1_base = BXT_ADSP_SRAM1_BASE; + sst->addr.w0_stat_sz = SKL_ADSP_W0_STAT_SZ; + sst->addr.w0_up_sz = SKL_ADSP_W0_UP_SZ; sst_dsp_mailbox_init(sst, (BXT_ADSP_SRAM0_BASE + SKL_ADSP_W0_STAT_SZ), SKL_ADSP_W0_UP_SZ, BXT_ADSP_SRAM1_BASE, SKL_ADSP_W1_SZ); diff --git a/sound/soc/intel/skylake/skl-sst.c b/sound/soc/intel/skylake/skl-sst.c index 155e456b7a3a..aba9ea11ac74 100644 --- a/sound/soc/intel/skylake/skl-sst.c +++ b/sound/soc/intel/skylake/skl-sst.c @@ -553,6 +553,11 @@ int skl_sst_dsp_init(struct device *dev, void __iomem *mmio_base, int irq, sst = skl->dsp; sst->addr.lpe = mmio_base; sst->addr.shim = mmio_base; + sst->addr.sram0_base = SKL_ADSP_SRAM0_BASE; + sst->addr.sram1_base = SKL_ADSP_SRAM1_BASE; + sst->addr.w0_stat_sz = SKL_ADSP_W0_STAT_SZ; + sst->addr.w0_up_sz = SKL_ADSP_W0_UP_SZ; + sst_dsp_mailbox_init(sst, (SKL_ADSP_SRAM0_BASE + SKL_ADSP_W0_STAT_SZ), SKL_ADSP_W0_UP_SZ, SKL_ADSP_SRAM1_BASE, SKL_ADSP_W1_SZ); |