diff options
Diffstat (limited to 'sound/soc/sof/intel/hda-ctrl.c')
-rw-r--r-- | sound/soc/sof/intel/hda-ctrl.c | 102 |
1 files changed, 24 insertions, 78 deletions
diff --git a/sound/soc/sof/intel/hda-ctrl.c b/sound/soc/sof/intel/hda-ctrl.c index 0c29bb196e59..3aea36c077c9 100644 --- a/sound/soc/sof/intel/hda-ctrl.c +++ b/sound/soc/sof/intel/hda-ctrl.c @@ -22,12 +22,6 @@ #include "../ops.h" #include "hda.h" -#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) -static int hda_codec_mask = -1; -module_param_named(codec_mask, hda_codec_mask, int, 0444); -MODULE_PARM_DESC(codec_mask, "SOF HDA codec mask for probing"); -#endif - /* * HDA Operations. */ @@ -182,72 +176,40 @@ int hda_dsp_ctrl_clock_power_gating(struct snd_sof_dev *sdev, bool enable) return 0; } -int hda_dsp_ctrl_init_chip(struct snd_sof_dev *sdev, bool full_reset) +int hda_dsp_ctrl_init_chip(struct snd_sof_dev *sdev) { struct hdac_bus *bus = sof_to_bus(sdev); -#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) - struct hdac_ext_link *hlink; -#endif struct hdac_stream *stream; int sd_offset, ret = 0; if (bus->chip_init) return 0; -#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) - snd_hdac_set_codec_wakeup(bus, true); -#endif - hda_dsp_ctrl_misc_clock_gating(sdev, false); + hda_codec_set_codec_wakeup(sdev, true); - if (full_reset) { - /* reset HDA controller */ - ret = hda_dsp_ctrl_link_reset(sdev, true); - if (ret < 0) { - dev_err(sdev->dev, "error: failed to reset HDA controller\n"); - goto err; - } - - usleep_range(500, 1000); - - /* exit HDA controller reset */ - ret = hda_dsp_ctrl_link_reset(sdev, false); - if (ret < 0) { - dev_err(sdev->dev, "error: failed to exit HDA controller reset\n"); - goto err; - } - - usleep_range(1000, 1200); - } + hda_dsp_ctrl_misc_clock_gating(sdev, false); -#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) - /* check to see if controller is ready */ - if (!snd_hdac_chip_readb(bus, GCTL)) { - dev_dbg(bus->dev, "controller not ready!\n"); - ret = -EBUSY; + /* reset HDA controller */ + ret = hda_dsp_ctrl_link_reset(sdev, true); + if (ret < 0) { + dev_err(sdev->dev, "error: failed to reset HDA controller\n"); goto err; } - /* Accept unsolicited responses */ - snd_hdac_chip_updatel(bus, GCTL, AZX_GCTL_UNSOL, AZX_GCTL_UNSOL); - - /* detect codecs */ - if (!bus->codec_mask) { - bus->codec_mask = snd_hdac_chip_readw(bus, STATESTS); - dev_dbg(bus->dev, "codec_mask = 0x%lx\n", bus->codec_mask); + /* exit HDA controller reset */ + ret = hda_dsp_ctrl_link_reset(sdev, false); + if (ret < 0) { + dev_err(sdev->dev, "error: failed to exit HDA controller reset\n"); + goto err; } - if (hda_codec_mask != -1) { - bus->codec_mask &= hda_codec_mask; - dev_dbg(bus->dev, "filtered codec_mask = 0x%lx\n", - bus->codec_mask); - } -#endif + hda_codec_detect_mask(sdev); /* clear stream status */ list_for_each_entry(stream, &bus->stream_list, list) { sd_offset = SOF_STREAM_SD_OFFSET(stream); snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, - sd_offset + SOF_HDA_ADSP_REG_CL_SD_STS, + sd_offset + SOF_HDA_ADSP_REG_SD_STS, SOF_HDA_CL_DMA_SD_INT_MASK); } @@ -255,19 +217,13 @@ int hda_dsp_ctrl_init_chip(struct snd_sof_dev *sdev, bool full_reset) snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, SOF_HDA_WAKESTS, SOF_HDA_WAKESTS_INT_MASK); -#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) - /* clear rirb status */ - snd_hdac_chip_writeb(bus, RIRBSTS, RIRB_INT_MASK); -#endif + hda_codec_rirb_status_clear(sdev); /* clear interrupt status register */ snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS, SOF_HDA_INT_CTRL_EN | SOF_HDA_INT_ALL_STREAM); -#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) - /* initialize the codec command I/O */ - snd_hdac_bus_init_cmd_io(bus); -#endif + hda_codec_init_cmd_io(sdev); /* enable CIE and GIE interrupts */ snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL, @@ -282,19 +238,14 @@ int hda_dsp_ctrl_init_chip(struct snd_sof_dev *sdev, bool full_reset) upper_32_bits(bus->posbuf.addr)); } -#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) - /* Reset stream-to-link mapping */ - list_for_each_entry(hlink, &bus->hlink_list, list) - writel(0, hlink->ml_addr + AZX_REG_ML_LOSIDV); -#endif + hda_bus_ml_reset_losidv(bus); bus->chip_init = true; err: hda_dsp_ctrl_misc_clock_gating(sdev, true); -#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) - snd_hdac_set_codec_wakeup(bus, false); -#endif + + hda_codec_set_codec_wakeup(sdev, false); return ret; } @@ -313,7 +264,7 @@ void hda_dsp_ctrl_stop_chip(struct snd_sof_dev *sdev) sd_offset = SOF_STREAM_SD_OFFSET(stream); snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, sd_offset + - SOF_HDA_ADSP_REG_CL_SD_CTL, + SOF_HDA_ADSP_REG_SD_CTL, SOF_HDA_CL_DMA_SD_INT_MASK, 0); } @@ -331,7 +282,7 @@ void hda_dsp_ctrl_stop_chip(struct snd_sof_dev *sdev) list_for_each_entry(stream, &bus->stream_list, list) { sd_offset = SOF_STREAM_SD_OFFSET(stream); snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, - sd_offset + SOF_HDA_ADSP_REG_CL_SD_STS, + sd_offset + SOF_HDA_ADSP_REG_SD_STS, SOF_HDA_CL_DMA_SD_INT_MASK); } @@ -339,19 +290,14 @@ void hda_dsp_ctrl_stop_chip(struct snd_sof_dev *sdev) snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, SOF_HDA_WAKESTS, SOF_HDA_WAKESTS_INT_MASK); -#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) - /* clear rirb status */ - snd_hdac_chip_writeb(bus, RIRBSTS, RIRB_INT_MASK); -#endif + hda_codec_rirb_status_clear(sdev); /* clear interrupt status register */ snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTSTS, SOF_HDA_INT_CTRL_EN | SOF_HDA_INT_ALL_STREAM); -#if IS_ENABLED(CONFIG_SND_SOC_SOF_HDA) - /* disable CORB/RIRB */ - snd_hdac_bus_stop_cmd_io(bus); -#endif + hda_codec_stop_cmd_io(sdev); + /* disable position buffer */ if (bus->use_posbuf && bus->posbuf.addr) { snd_sof_dsp_write(sdev, HDA_DSP_HDA_BAR, |