diff options
Diffstat (limited to 'arch/powerpc')
| -rw-r--r-- | arch/powerpc/boot/dts/tqm8548-bigflash.dts | 7 | ||||
| -rw-r--r-- | arch/powerpc/boot/dts/tqm8548.dts | 7 | ||||
| -rw-r--r-- | arch/powerpc/sysdev/fsl_lbc.c | 2 |
3 files changed, 11 insertions, 5 deletions
diff --git a/arch/powerpc/boot/dts/tqm8548-bigflash.dts b/arch/powerpc/boot/dts/tqm8548-bigflash.dts index 28b1a95257cd..19aa72301c83 100644 --- a/arch/powerpc/boot/dts/tqm8548-bigflash.dts +++ b/arch/powerpc/boot/dts/tqm8548-bigflash.dts @@ -397,10 +397,13 @@ upm@3,0 { #address-cells = <0>; #size-cells = <0>; - compatible = "fsl,upm-nand"; + compatible = "tqc,tqm8548-upm-nand", "fsl,upm-nand"; reg = <3 0x0 0x800>; fsl,upm-addr-offset = <0x10>; fsl,upm-cmd-offset = <0x08>; + /* Micron MT29F8G08FAB multi-chip device */ + fsl,upm-addr-line-cs-offsets = <0x0 0x200>; + fsl,upm-wait-flags = <0x5>; chip-delay = <25>; // in micro-seconds nand@0 { @@ -409,7 +412,7 @@ partition@0 { label = "fs"; - reg = <0x00000000 0x01000000>; + reg = <0x00000000 0x10000000>; }; }; }; diff --git a/arch/powerpc/boot/dts/tqm8548.dts b/arch/powerpc/boot/dts/tqm8548.dts index 826fb622cd3c..49145a04fc6c 100644 --- a/arch/powerpc/boot/dts/tqm8548.dts +++ b/arch/powerpc/boot/dts/tqm8548.dts @@ -397,10 +397,13 @@ upm@3,0 { #address-cells = <0>; #size-cells = <0>; - compatible = "fsl,upm-nand"; + compatible = "tqc,tqm8548-upm-nand", "fsl,upm-nand"; reg = <3 0x0 0x800>; fsl,upm-addr-offset = <0x10>; fsl,upm-cmd-offset = <0x08>; + /* Micron MT29F8G08FAB multi-chip device */ + fsl,upm-addr-line-cs-offsets = <0x0 0x200>; + fsl,upm-wait-flags = <0x5>; chip-delay = <25>; // in micro-seconds nand@0 { @@ -409,7 +412,7 @@ partition@0 { label = "fs"; - reg = <0x00000000 0x01000000>; + reg = <0x00000000 0x10000000>; }; }; }; diff --git a/arch/powerpc/sysdev/fsl_lbc.c b/arch/powerpc/sysdev/fsl_lbc.c index 0494ee55920f..dceb8d1a843d 100644 --- a/arch/powerpc/sysdev/fsl_lbc.c +++ b/arch/powerpc/sysdev/fsl_lbc.c @@ -150,7 +150,7 @@ int fsl_upm_run_pattern(struct fsl_upm *upm, void __iomem *io_base, u32 mar) spin_lock_irqsave(&fsl_lbc_lock, flags); - out_be32(&fsl_lbc_regs->mar, mar << (32 - upm->width)); + out_be32(&fsl_lbc_regs->mar, mar); switch (upm->width) { case 8: |