diff options
Diffstat (limited to 'arch/arm/mach-omap2')
22 files changed, 232 insertions, 237 deletions
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index ceefcee6bb85..0ba6a0e6fa19 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -223,8 +223,6 @@ obj-$(CONFIG_SOC_DRA7XX) += omap_hwmod_7xx_data.o # EMU peripherals obj-$(CONFIG_HW_PERF_EVENTS) += pmu.o -obj-$(CONFIG_OMAP_IOMMU) += omap-iommu.o - # OMAP2420 MSDI controller integration support ("MMC") obj-$(CONFIG_SOC_OMAP2420) += msdi.o diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c index 0a0567f8e8a0..da174c0d603b 100644 --- a/arch/arm/mach-omap2/board-rx51-peripherals.c +++ b/arch/arm/mach-omap2/board-rx51-peripherals.c @@ -1257,7 +1257,7 @@ static struct platform_device omap3_rom_rng_device = { static void __init rx51_init_omap3_rom_rng(void) { if (omap_type() == OMAP2_DEVICE_TYPE_SEC) { - pr_info("RX-51: Registring OMAP3 HWRNG device\n"); + pr_info("RX-51: Registering OMAP3 HWRNG device\n"); platform_device_register(&omap3_rom_rng_device); } } diff --git a/arch/arm/mach-omap2/clockdomains81xx_data.c b/arch/arm/mach-omap2/clockdomains81xx_data.c index 53442c86a820..3b5fb05ae701 100644 --- a/arch/arm/mach-omap2/clockdomains81xx_data.c +++ b/arch/arm/mach-omap2/clockdomains81xx_data.c @@ -83,6 +83,14 @@ static struct clockdomain mmu_cfg_81xx_clkdm = { .flags = CLKDM_CAN_SWSUP, }; +static struct clockdomain default_l3_slow_81xx_clkdm = { + .name = "default_l3_slow_clkdm", + .pwrdm = { .name = "default_pwrdm" }, + .cm_inst = TI81XX_CM_DEFAULT_MOD, + .clkdm_offs = TI816X_CM_DEFAULT_L3_SLOW_CLKDM, + .flags = CLKDM_CAN_SWSUP, +}; + /* 816x only */ static struct clockdomain alwon_mpu_816x_clkdm = { @@ -96,7 +104,7 @@ static struct clockdomain alwon_mpu_816x_clkdm = { static struct clockdomain active_gem_816x_clkdm = { .name = "active_gem_clkdm", .pwrdm = { .name = "active_pwrdm" }, - .cm_inst = TI816X_CM_ACTIVE_MOD, + .cm_inst = TI81XX_CM_ACTIVE_MOD, .clkdm_offs = TI816X_CM_ACTIVE_GEM_CLKDM, .flags = CLKDM_CAN_SWSUP, }; @@ -128,7 +136,7 @@ static struct clockdomain ivahd2_816x_clkdm = { static struct clockdomain sgx_816x_clkdm = { .name = "sgx_clkdm", .pwrdm = { .name = "sgx_pwrdm" }, - .cm_inst = TI816X_CM_SGX_MOD, + .cm_inst = TI81XX_CM_SGX_MOD, .clkdm_offs = TI816X_CM_SGX_CLKDM, .flags = CLKDM_CAN_SWSUP, }; @@ -136,7 +144,7 @@ static struct clockdomain sgx_816x_clkdm = { static struct clockdomain default_l3_med_816x_clkdm = { .name = "default_l3_med_clkdm", .pwrdm = { .name = "default_pwrdm" }, - .cm_inst = TI816X_CM_DEFAULT_MOD, + .cm_inst = TI81XX_CM_DEFAULT_MOD, .clkdm_offs = TI816X_CM_DEFAULT_L3_MED_CLKDM, .flags = CLKDM_CAN_SWSUP, }; @@ -144,7 +152,7 @@ static struct clockdomain default_l3_med_816x_clkdm = { static struct clockdomain default_ducati_816x_clkdm = { .name = "default_ducati_clkdm", .pwrdm = { .name = "default_pwrdm" }, - .cm_inst = TI816X_CM_DEFAULT_MOD, + .cm_inst = TI81XX_CM_DEFAULT_MOD, .clkdm_offs = TI816X_CM_DEFAULT_DUCATI_CLKDM, .flags = CLKDM_CAN_SWSUP, }; @@ -152,19 +160,11 @@ static struct clockdomain default_ducati_816x_clkdm = { static struct clockdomain default_pci_816x_clkdm = { .name = "default_pci_clkdm", .pwrdm = { .name = "default_pwrdm" }, - .cm_inst = TI816X_CM_DEFAULT_MOD, + .cm_inst = TI81XX_CM_DEFAULT_MOD, .clkdm_offs = TI816X_CM_DEFAULT_PCI_CLKDM, .flags = CLKDM_CAN_SWSUP, }; -static struct clockdomain default_l3_slow_816x_clkdm = { - .name = "default_l3_slow_clkdm", - .pwrdm = { .name = "default_pwrdm" }, - .cm_inst = TI816X_CM_DEFAULT_MOD, - .clkdm_offs = TI816X_CM_DEFAULT_L3_SLOW_CLKDM, - .flags = CLKDM_CAN_SWSUP, -}; - static struct clockdomain *clockdomains_ti814x[] __initdata = { &alwon_l3_slow_81xx_clkdm, &alwon_l3_med_81xx_clkdm, @@ -172,6 +172,7 @@ static struct clockdomain *clockdomains_ti814x[] __initdata = { &alwon_ethernet_81xx_clkdm, &mmu_81xx_clkdm, &mmu_cfg_81xx_clkdm, + &default_l3_slow_81xx_clkdm, NULL, }; @@ -198,7 +199,7 @@ static struct clockdomain *clockdomains_ti816x[] __initdata = { &default_l3_med_816x_clkdm, &default_ducati_816x_clkdm, &default_pci_816x_clkdm, - &default_l3_slow_816x_clkdm, + &default_l3_slow_81xx_clkdm, NULL, }; diff --git a/arch/arm/mach-omap2/cm81xx.h b/arch/arm/mach-omap2/cm81xx.h index 45cb407da222..3a0ccf07c76f 100644 --- a/arch/arm/mach-omap2/cm81xx.h +++ b/arch/arm/mach-omap2/cm81xx.h @@ -18,15 +18,15 @@ #define __ARCH_ARM_MACH_OMAP2_CM_TI81XX_H /* TI81XX common CM module offsets */ +#define TI81XX_CM_ACTIVE_MOD 0x0400 /* 256B */ +#define TI81XX_CM_DEFAULT_MOD 0x0500 /* 256B */ #define TI81XX_CM_ALWON_MOD 0x1400 /* 1KB */ +#define TI81XX_CM_SGX_MOD 0x0900 /* 256B */ /* TI816X CM module offsets */ -#define TI816X_CM_ACTIVE_MOD 0x0400 /* 256B */ -#define TI816X_CM_DEFAULT_MOD 0x0500 /* 256B */ #define TI816X_CM_IVAHD0_MOD 0x0600 /* 256B */ #define TI816X_CM_IVAHD1_MOD 0x0700 /* 256B */ #define TI816X_CM_IVAHD2_MOD 0x0800 /* 256B */ -#define TI816X_CM_SGX_MOD 0x0900 /* 256B */ /* ALWON */ #define TI81XX_CM_ALWON_L3_SLOW_CLKDM 0x0000 diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index 0cba9575d2ca..f7666b9f3b21 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h @@ -270,7 +270,7 @@ extern u32 omap_read_auxcoreboot0(void); extern void omap4_cpu_die(unsigned int cpu); -extern struct smp_operations omap4_smp_ops; +extern const struct smp_operations omap4_smp_ops; extern void omap5_secondary_startup(void); extern void omap5_secondary_hyp_startup(void); diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 9374da313e8e..9cda974a3009 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c @@ -94,22 +94,6 @@ static inline void omap_init_mbox(void) { } static inline void omap_init_sti(void) {} -#if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE) - -static struct platform_device omap_pcm = { - .name = "omap-pcm-audio", - .id = -1, -}; - -static void omap_init_audio(void) -{ - platform_device_register(&omap_pcm); -} - -#else -static inline void omap_init_audio(void) {} -#endif - #if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE) #include <linux/platform_data/spi-omap2-mcspi.h> @@ -239,13 +223,12 @@ static int __init omap2_init_devices(void) if (!of_have_populated_dt()) pinctrl_provide_dummies(); - /* - * please keep these calls, and their implementations above, - * in alphabetical order so they're easier to sort through. - */ - omap_init_audio(); /* If dtb is there, the devices will be created dynamically */ if (!of_have_populated_dt()) { + /* + * please keep these calls, and their implementations above, + * in alphabetical order so they're easier to sort through. + */ omap_init_mbox(); omap_init_mcspi(); omap_init_sham(); diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index 8a2ae82cb227..d85c24918c17 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -488,6 +488,7 @@ void __init omap3xxx_check_revision(void) } break; case 0xb8f2: + case 0xb968: switch (rev) { case 0: /* FALLTHROUGH */ @@ -511,7 +512,8 @@ void __init omap3xxx_check_revision(void) /* Unknown default to latest silicon rev as default */ omap_revision = OMAP3630_REV_ES1_2; cpu_rev = "1.2"; - pr_warn("Warning: unknown chip type; assuming OMAP3630ES1.2\n"); + pr_warn("Warning: unknown chip type: hawkeye %04x, assuming OMAP3630ES1.2\n", + hawkeye); } sprintf(soc_rev, "ES%s", cpu_rev); } diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 3eaeaca5da05..3c87e40650cf 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -612,8 +612,7 @@ void __init ti814x_init_early(void) ti814x_clockdomains_init(); dm814x_hwmod_init(); omap_hwmod_init_postsetup(); - if (of_have_populated_dt()) - omap_clk_soc_init = dm814x_dt_clk_init; + omap_clk_soc_init = dm814x_dt_clk_init; } void __init ti816x_init_early(void) diff --git a/arch/arm/mach-omap2/omap-iommu.c b/arch/arm/mach-omap2/omap-iommu.c deleted file mode 100644 index 8867eb4025bf..000000000000 --- a/arch/arm/mach-omap2/omap-iommu.c +++ /dev/null @@ -1,66 +0,0 @@ -/* - * omap iommu: omap device registration - * - * Copyright (C) 2008-2009 Nokia Corporation - * - * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/of.h> -#include <linux/platform_device.h> -#include <linux/err.h> -#include <linux/slab.h> - -#include <linux/platform_data/iommu-omap.h> -#include "soc.h" -#include "omap_hwmod.h" -#include "omap_device.h" - -static int __init omap_iommu_dev_init(struct omap_hwmod *oh, void *unused) -{ - struct platform_device *pdev; - struct iommu_platform_data *pdata; - struct omap_mmu_dev_attr *a = (struct omap_mmu_dev_attr *)oh->dev_attr; - static int i; - - pdata = kzalloc(sizeof(*pdata), GFP_KERNEL); - if (!pdata) - return -ENOMEM; - - pdata->name = oh->name; - pdata->nr_tlb_entries = a->nr_tlb_entries; - - if (oh->rst_lines_cnt == 1) { - pdata->reset_name = oh->rst_lines->name; - pdata->assert_reset = omap_device_assert_hardreset; - pdata->deassert_reset = omap_device_deassert_hardreset; - } - - pdev = omap_device_build("omap-iommu", i, oh, pdata, sizeof(*pdata)); - - kfree(pdata); - - if (IS_ERR(pdev)) { - pr_err("%s: device build err: %ld\n", __func__, PTR_ERR(pdev)); - return PTR_ERR(pdev); - } - - i++; - - return 0; -} - -static int __init omap_iommu_init(void) -{ - /* If dtb is there, the devices will be created dynamically */ - if (of_have_populated_dt()) - return -ENODEV; - - return omap_hwmod_for_each_by_class("mmu", omap_iommu_dev_init, NULL); -} -omap_subsys_initcall(omap_iommu_init); -/* must be ready before omap3isp is probed */ diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c index 79e1f876d1c9..c625cc10d9f9 100644 --- a/arch/arm/mach-omap2/omap-smp.c +++ b/arch/arm/mach-omap2/omap-smp.c @@ -241,7 +241,7 @@ static void __init omap4_smp_prepare_cpus(unsigned int max_cpus) } -struct smp_operations omap4_smp_ops __initdata = { +const struct smp_operations omap4_smp_ops __initconst = { .smp_init_cpus = omap4_smp_init_cpus, .smp_prepare_cpus = omap4_smp_prepare_cpus, .smp_secondary_init = omap4_secondary_init, diff --git a/arch/arm/mach-omap2/omap2-restart.c b/arch/arm/mach-omap2/omap2-restart.c index d937b2e4040b..497269db882b 100644 --- a/arch/arm/mach-omap2/omap2-restart.c +++ b/arch/arm/mach-omap2/omap2-restart.c @@ -62,4 +62,4 @@ static int __init omap2xxx_common_look_up_clks_for_reset(void) return 0; } -omap_core_initcall(omap2xxx_common_look_up_clks_for_reset); +omap_postcore_initcall(omap2xxx_common_look_up_clks_for_reset); diff --git a/arch/arm/mach-omap2/omap_device.c b/arch/arm/mach-omap2/omap_device.c index 72ebc4c16bae..0437537751bc 100644 --- a/arch/arm/mach-omap2/omap_device.c +++ b/arch/arm/mach-omap2/omap_device.c @@ -32,6 +32,7 @@ #include <linux/io.h> #include <linux/clk.h> #include <linux/clkdev.h> +#include <linux/pm_domain.h> #include <linux/pm_runtime.h> #include <linux/of.h> #include <linux/notifier.h> @@ -168,7 +169,7 @@ static int omap_device_build_from_dt(struct platform_device *pdev) r->name = dev_name(&pdev->dev); } - pdev->dev.pm_domain = &omap_device_pm_domain; + dev_pm_domain_set(&pdev->dev, &omap_device_pm_domain); if (device_active) { omap_device_enable(pdev); @@ -180,7 +181,7 @@ odbfd_exit1: odbfd_exit: /* if data/we are at fault.. load up a fail handler */ if (ret) - pdev->dev.pm_domain = &omap_device_fail_pm_domain; + dev_pm_domain_set(&pdev->dev, &omap_device_fail_pm_domain); return ret; } @@ -701,7 +702,7 @@ int omap_device_register(struct platform_device *pdev) { pr_debug("omap_device: %s: registering\n", pdev->name); - pdev->dev.pm_domain = &omap_device_pm_domain; + dev_pm_domain_set(&pdev->dev, &omap_device_pm_domain); return platform_device_add(pdev); } @@ -869,7 +870,7 @@ static int __init omap_device_init(void) bus_register_notifier(&platform_bus_type, &platform_nb); return 0; } -omap_core_initcall(omap_device_init); +omap_postcore_initcall(omap_device_init); /** * omap_device_late_idle - idle devices without drivers diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 48495ad82aba..e9f65fec55c0 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -3313,7 +3313,7 @@ static int __init omap_hwmod_setup_all(void) return 0; } -omap_core_initcall(omap_hwmod_setup_all); +omap_postcore_initcall(omap_hwmod_setup_all); /** * omap_hwmod_enable - enable an omap_hwmod diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index aff78d5198d2..0a985325cd64 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -25,7 +25,6 @@ #include "l4_3xxx.h" #include <linux/platform_data/asoc-ti-mcbsp.h> #include <linux/platform_data/spi-omap2-mcspi.h> -#include <linux/platform_data/iommu-omap.h> #include <plat/dmtimer.h> #include "soc.h" @@ -2957,80 +2956,40 @@ static struct omap_hwmod_class omap3xxx_mmu_hwmod_class = { }; /* mmu isp */ - -static struct omap_mmu_dev_attr mmu_isp_dev_attr = { - .nr_tlb_entries = 8, -}; - static struct omap_hwmod omap3xxx_mmu_isp_hwmod; -static struct omap_hwmod_irq_info omap3xxx_mmu_isp_irqs[] = { - { .irq = 24 + OMAP_INTC_START, }, - { .irq = -1 } -}; - -static struct omap_hwmod_addr_space omap3xxx_mmu_isp_addrs[] = { - { - .pa_start = 0x480bd400, - .pa_end = 0x480bd47f, - .flags = ADDR_TYPE_RT, - }, - { } -}; /* l4_core -> mmu isp */ static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmu_isp = { .master = &omap3xxx_l4_core_hwmod, .slave = &omap3xxx_mmu_isp_hwmod, - .addr = omap3xxx_mmu_isp_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; static struct omap_hwmod omap3xxx_mmu_isp_hwmod = { .name = "mmu_isp", .class = &omap3xxx_mmu_hwmod_class, - .mpu_irqs = omap3xxx_mmu_isp_irqs, .main_clk = "cam_ick", - .dev_attr = &mmu_isp_dev_attr, .flags = HWMOD_NO_IDLEST, }; /* mmu iva */ -static struct omap_mmu_dev_attr mmu_iva_dev_attr = { - .nr_tlb_entries = 32, -}; - static struct omap_hwmod omap3xxx_mmu_iva_hwmod; -static struct omap_hwmod_irq_info omap3xxx_mmu_iva_irqs[] = { - { .irq = 28 + OMAP_INTC_START, }, - { .irq = -1 } -}; static struct omap_hwmod_rst_info omap3xxx_mmu_iva_resets[] = { { .name = "mmu", .rst_shift = 1, .st_shift = 9 }, }; -static struct omap_hwmod_addr_space omap3xxx_mmu_iva_addrs[] = { - { - .pa_start = 0x5d000000, - .pa_end = 0x5d00007f, - .flags = ADDR_TYPE_RT, - }, - { } -}; - /* l3_main -> iva mmu */ static struct omap_hwmod_ocp_if omap3xxx_l3_main__mmu_iva = { .master = &omap3xxx_l3_main_hwmod, .slave = &omap3xxx_mmu_iva_hwmod, - .addr = omap3xxx_mmu_iva_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; static struct omap_hwmod omap3xxx_mmu_iva_hwmod = { .name = "mmu_iva", .class = &omap3xxx_mmu_hwmod_class, - .mpu_irqs = omap3xxx_mmu_iva_irqs, .clkdm_name = "iva2_clkdm", .rst_lines = omap3xxx_mmu_iva_resets, .rst_lines_cnt = ARRAY_SIZE(omap3xxx_mmu_iva_resets), @@ -3043,7 +3002,6 @@ static struct omap_hwmod omap3xxx_mmu_iva_hwmod = { .idlest_idle_bit = OMAP3430_ST_IVA2_SHIFT, }, }, - .dev_attr = &mmu_iva_dev_attr, .flags = HWMOD_NO_IDLEST, }; diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index a5e444b1e57a..dad871a4cd96 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -30,7 +30,6 @@ #include <linux/platform_data/spi-omap2-mcspi.h> #include <linux/platform_data/asoc-ti-mcbsp.h> -#include <linux/platform_data/iommu-omap.h> #include <plat/dmtimer.h> #include "omap_hwmod.h" @@ -2088,30 +2087,16 @@ static struct omap_hwmod_class omap44xx_mmu_hwmod_class = { /* mmu ipu */ -static struct omap_mmu_dev_attr mmu_ipu_dev_attr = { - .nr_tlb_entries = 32, -}; - static struct omap_hwmod omap44xx_mmu_ipu_hwmod; static struct omap_hwmod_rst_info omap44xx_mmu_ipu_resets[] = { { .name = "mmu_cache", .rst_shift = 2 }, }; -static struct omap_hwmod_addr_space omap44xx_mmu_ipu_addrs[] = { - { - .pa_start = 0x55082000, - .pa_end = 0x550820ff, - .flags = ADDR_TYPE_RT, - }, - { } -}; - /* l3_main_2 -> mmu_ipu */ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__mmu_ipu = { .master = &omap44xx_l3_main_2_hwmod, .slave = &omap44xx_mmu_ipu_hwmod, .clk = "l3_div_ck", - .addr = omap44xx_mmu_ipu_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2130,35 +2115,20 @@ static struct omap_hwmod omap44xx_mmu_ipu_hwmod = { .modulemode = MODULEMODE_HWCTRL, }, }, - .dev_attr = &mmu_ipu_dev_attr, }; /* mmu dsp */ -static struct omap_mmu_dev_attr mmu_dsp_dev_attr = { - .nr_tlb_entries = 32, -}; - static struct omap_hwmod omap44xx_mmu_dsp_hwmod; static struct omap_hwmod_rst_info omap44xx_mmu_dsp_resets[] = { { .name = "mmu_cache", .rst_shift = 1 }, }; -static struct omap_hwmod_addr_space omap44xx_mmu_dsp_addrs[] = { - { - .pa_start = 0x4a066000, - .pa_end = 0x4a0660ff, - .flags = ADDR_TYPE_RT, - }, - { } -}; - /* l4_cfg -> dsp */ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__mmu_dsp = { .master = &omap44xx_l4_cfg_hwmod, .slave = &omap44xx_mmu_dsp_hwmod, .clk = "l4_div_ck", - .addr = omap44xx_mmu_dsp_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2177,7 +2147,6 @@ static struct omap_hwmod omap44xx_mmu_dsp_hwmod = { .modulemode = MODULEMODE_HWCTRL, }, }, - .dev_attr = &mmu_dsp_dev_attr, }; /* @@ -3915,21 +3884,11 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_venc = { .user = OCP_USER_MPU, }; -static struct omap_hwmod_addr_space omap44xx_elm_addrs[] = { - { - .pa_start = 0x48078000, - .pa_end = 0x48078fff, - .flags = ADDR_TYPE_RT - }, - { } -}; - /* l4_per -> elm */ static struct omap_hwmod_ocp_if omap44xx_l4_per__elm = { .master = &omap44xx_l4_per_hwmod, .slave = &omap44xx_elm_hwmod, .clk = "l4_div_ck", - .addr = omap44xx_elm_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c index ee4e04434a94..848356e38b74 100644 --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c @@ -2103,7 +2103,7 @@ static struct omap_hwmod dra7xx_uart4_hwmod = { .class = &dra7xx_uart_hwmod_class, .clkdm_name = "l4per_clkdm", .main_clk = "uart4_gfclk_mux", - .flags = HWMOD_SWSUP_SIDLE_ACT, + .flags = HWMOD_SWSUP_SIDLE_ACT | DEBUG_OMAP4UART4_FLAGS, .prcm = { .omap4 = { .clkctrl_offs = DRA7XX_CM_L4PER_UART4_CLKCTRL_OFFSET, diff --git a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c index 6256052893ec..e493ae372910 100644 --- a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c @@ -104,8 +104,8 @@ * The default .clkctrl_offs field is offset from CM_DEFAULT, that's * TRM 18.7.6 CM_DEFAULT device register values minus 0x500 */ -#define DM816X_CM_DEFAULT_OFFSET 0x500 -#define DM816X_CM_DEFAULT_USB_CLKCTRL (0x558 - DM816X_CM_DEFAULT_OFFSET) +#define DM81XX_CM_DEFAULT_OFFSET 0x500 +#define DM81XX_CM_DEFAULT_USB_CLKCTRL (0x558 - DM81XX_CM_DEFAULT_OFFSET) /* L3 Interconnect entries clocked at 125, 250 and 500MHz */ static struct omap_hwmod dm81xx_alwon_l3_slow_hwmod = { @@ -557,22 +557,42 @@ static struct omap_hwmod_class dm81xx_usbotg_class = { .sysc = &dm81xx_usbhsotg_sysc, }; -static struct omap_hwmod dm81xx_usbss_hwmod = { +static struct omap_hwmod dm814x_usbss_hwmod = { + .name = "usb_otg_hs", + .clkdm_name = "default_l3_slow_clkdm", + .main_clk = "pll260dcoclkldo", /* 481c5260.adpll.dcoclkldo */ + .prcm = { + .omap4 = { + .clkctrl_offs = DM81XX_CM_DEFAULT_USB_CLKCTRL, + .modulemode = MODULEMODE_SWCTRL, + }, + }, + .class = &dm81xx_usbotg_class, +}; + +static struct omap_hwmod_ocp_if dm814x_default_l3_slow__usbss = { + .master = &dm81xx_default_l3_slow_hwmod, + .slave = &dm814x_usbss_hwmod, + .clk = "sysclk6_ck", + .user = OCP_USER_MPU, +}; + +static struct omap_hwmod dm816x_usbss_hwmod = { .name = "usb_otg_hs", .clkdm_name = "default_l3_slow_clkdm", .main_clk = "sysclk6_ck", .prcm = { .omap4 = { - .clkctrl_offs = DM816X_CM_DEFAULT_USB_CLKCTRL, + .clkctrl_offs = DM81XX_CM_DEFAULT_USB_CLKCTRL, .modulemode = MODULEMODE_SWCTRL, }, }, .class = &dm81xx_usbotg_class, }; -static struct omap_hwmod_ocp_if dm81xx_default_l3_slow__usbss = { +static struct omap_hwmod_ocp_if dm816x_default_l3_slow__usbss = { .master = &dm81xx_default_l3_slow_hwmod, - .slave = &dm81xx_usbss_hwmod, + .slave = &dm816x_usbss_hwmod, .clk = "sysclk6_ck", .user = OCP_USER_MPU, }; @@ -599,7 +619,7 @@ static struct omap_timer_capability_dev_attr capability_alwon_dev_attr = { static struct omap_hwmod dm814x_timer1_hwmod = { .name = "timer1", .clkdm_name = "alwon_l3s_clkdm", - .main_clk = "timer_sys_ck", + .main_clk = "timer1_fck", .dev_attr = &capability_alwon_dev_attr, .class = &dm816x_timer_hwmod_class, .flags = HWMOD_NO_IDLEST, @@ -608,7 +628,7 @@ static struct omap_hwmod dm814x_timer1_hwmod = { static struct omap_hwmod_ocp_if dm814x_l4_ls__timer1 = { .master = &dm81xx_l4_ls_hwmod, .slave = &dm814x_timer1_hwmod, - .clk = "timer_sys_ck", + .clk = "timer1_fck", .user = OCP_USER_MPU, }; @@ -636,7 +656,7 @@ static struct omap_hwmod_ocp_if dm816x_l4_ls__timer1 = { static struct omap_hwmod dm814x_timer2_hwmod = { .name = "timer2", .clkdm_name = "alwon_l3s_clkdm", - .main_clk = "timer_sys_ck", + .main_clk = "timer2_fck", .dev_attr = &capability_alwon_dev_attr, .class = &dm816x_timer_hwmod_class, .flags = HWMOD_NO_IDLEST, @@ -645,7 +665,7 @@ static struct omap_hwmod dm814x_timer2_hwmod = { static struct omap_hwmod_ocp_if dm814x_l4_ls__timer2 = { .master = &dm81xx_l4_ls_hwmod, .slave = &dm814x_timer2_hwmod, - .clk = "timer_sys_ck", + .clk = "timer2_fck", .user = OCP_USER_MPU, }; @@ -912,7 +932,7 @@ static struct omap_hwmod_ocp_if dm816x_l4_hs__emac1 = { .user = OCP_USER_MPU, }; -static struct omap_hwmod_class_sysconfig dm816x_mmc_sysc = { +static struct omap_hwmod_class_sysconfig dm81xx_mmc_sysc = { .rev_offs = 0x0, .sysc_offs = 0x110, .syss_offs = 0x114, @@ -923,24 +943,94 @@ static struct omap_hwmod_class_sysconfig dm816x_mmc_sysc = { .sysc_fields = &omap_hwmod_sysc_type1, }; -static struct omap_hwmod_class dm816x_mmc_class = { +static struct omap_hwmod_class dm81xx_mmc_class = { .name = "mmc", - .sysc = &dm816x_mmc_sysc, + .sysc = &dm81xx_mmc_sysc, }; -static struct omap_hwmod_opt_clk dm816x_mmc1_opt_clks[] = { +static struct omap_hwmod_opt_clk dm81xx_mmc_opt_clks[] = { { .role = "dbck", .clk = "sysclk18_ck", }, }; -static struct omap_hsmmc_dev_attr mmc1_dev_attr = { - .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT, +static struct omap_hsmmc_dev_attr mmc_dev_attr = { +}; + +static struct omap_hwmod dm814x_mmc1_hwmod = { + .name = "mmc1", + .clkdm_name = "alwon_l3s_clkdm", + .opt_clks = dm81xx_mmc_opt_clks, + .opt_clks_cnt = ARRAY_SIZE(dm81xx_mmc_opt_clks), + .main_clk = "sysclk8_ck", + .prcm = { + .omap4 = { + .clkctrl_offs = DM814X_CM_ALWON_MMCHS_0_CLKCTRL, + .modulemode = MODULEMODE_SWCTRL, + }, + }, + .dev_attr = &mmc_dev_attr, + .class = &dm81xx_mmc_class, +}; + +static struct omap_hwmod_ocp_if dm814x_l4_ls__mmc1 = { + .master = &dm81xx_l4_ls_hwmod, + .slave = &dm814x_mmc1_hwmod, + .clk = "sysclk6_ck", + .user = OCP_USER_MPU, + .flags = OMAP_FIREWALL_L4 +}; + +static struct omap_hwmod dm814x_mmc2_hwmod = { + .name = "mmc2", + .clkdm_name = "alwon_l3s_clkdm", + .opt_clks = dm81xx_mmc_opt_clks, + .opt_clks_cnt = ARRAY_SIZE(dm81xx_mmc_opt_clks), + .main_clk = "sysclk8_ck", + .prcm = { + .omap4 = { + .clkctrl_offs = DM814X_CM_ALWON_MMCHS_1_CLKCTRL, + .modulemode = MODULEMODE_SWCTRL, + }, + }, + .dev_attr = &mmc_dev_attr, + .class = &dm81xx_mmc_class, +}; + +static struct omap_hwmod_ocp_if dm814x_l4_ls__mmc2 = { + .master = &dm81xx_l4_ls_hwmod, + .slave = &dm814x_mmc2_hwmod, + .clk = "sysclk6_ck", + .user = OCP_USER_MPU, + .flags = OMAP_FIREWALL_L4 +}; + +static struct omap_hwmod dm814x_mmc3_hwmod = { + .name = "mmc3", + .clkdm_name = "alwon_l3_med_clkdm", + .opt_clks = dm81xx_mmc_opt_clks, + .opt_clks_cnt = ARRAY_SIZE(dm81xx_mmc_opt_clks), + .main_clk = "sysclk8_ck", + .prcm = { + .omap4 = { + .clkctrl_offs = DM814X_CM_ALWON_MMCHS_2_CLKCTRL, + .modulemode = MODULEMODE_SWCTRL, + }, + }, + .dev_attr = &mmc_dev_attr, + .class = &dm81xx_mmc_class, +}; + +static struct omap_hwmod_ocp_if dm814x_alwon_l3_med__mmc3 = { + .master = &dm81xx_alwon_l3_med_hwmod, + .slave = &dm814x_mmc3_hwmod, + .clk = "sysclk4_ck", + .user = OCP_USER_MPU, }; static struct omap_hwmod dm816x_mmc1_hwmod = { .name = "mmc1", .clkdm_name = "alwon_l3s_clkdm", - .opt_clks = dm816x_mmc1_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(dm816x_mmc1_opt_clks), + .opt_clks = dm81xx_mmc_opt_clks, + .opt_clks_cnt = ARRAY_SIZE(dm81xx_mmc_opt_clks), .main_clk = "sysclk10_ck", .prcm = { .omap4 = { @@ -948,8 +1038,8 @@ static struct omap_hwmod dm816x_mmc1_hwmod = { .modulemode = MODULEMODE_SWCTRL, }, }, - .dev_attr = &mmc1_dev_attr, - .class = &dm816x_mmc_class, + .dev_attr = &mmc_dev_attr, + .class = &dm81xx_mmc_class, }; static struct omap_hwmod_ocp_if dm816x_l4_ls__mmc1 = { @@ -1036,6 +1126,40 @@ static struct omap_hwmod_ocp_if dm81xx_l4_ls__mailbox = { .user = OCP_USER_MPU, }; +static struct omap_hwmod_class_sysconfig dm81xx_spinbox_sysc = { + .rev_offs = 0x000, + .sysc_offs = 0x010, + .syss_offs = 0x014, + .sysc_flags = SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | + SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE, + .idlemodes = SIDLE_FORCE | SIDLE_NO | SIDLE_SMART, + .sysc_fields = &omap_hwmod_sysc_type1, +}; + +static struct omap_hwmod_class dm81xx_spinbox_hwmod_class = { + .name = "spinbox", + .sysc = &dm81xx_spinbox_sysc, +}; + +static struct omap_hwmod dm81xx_spinbox_hwmod = { + .name = "spinbox", + .clkdm_name = "alwon_l3s_clkdm", + .class = &dm81xx_spinbox_hwmod_class, + .main_clk = "sysclk6_ck", + .prcm = { + .omap4 = { + .clkctrl_offs = DM81XX_CM_ALWON_SPINBOX_CLKCTRL, + .modulemode = MODULEMODE_SWCTRL, + }, + }, +}; + +static struct omap_hwmod_ocp_if dm81xx_l4_ls__spinbox = { + .master = &dm81xx_l4_ls_hwmod, + .slave = &dm81xx_spinbox_hwmod, + .user = OCP_USER_MPU, +}; + static struct omap_hwmod_class dm81xx_tpcc_hwmod_class = { .name = "tpcc", }; @@ -1230,11 +1354,7 @@ static struct omap_hwmod_ocp_if dm81xx_tptc3__alwon_l3_fast = { /* * REVISIT: Test and enable the following once clocks work: - * dm81xx_l4_ls__gpio1 - * dm81xx_l4_ls__gpio2 * dm81xx_l4_ls__mailbox - * dm81xx_alwon_l3_slow__gpmc - * dm81xx_default_l3_slow__usbss * * Also note that some devices share a single clkctrl_offs.. * For example, i2c1 and 3 share one, and i2c2 and 4 share one. @@ -1250,8 +1370,12 @@ static struct omap_hwmod_ocp_if *dm814x_hwmod_ocp_ifs[] __initdata = { &dm81xx_l4_ls__wd_timer1, &dm81xx_l4_ls__i2c1, &dm81xx_l4_ls__i2c2, + &dm81xx_l4_ls__gpio1, + &dm81xx_l4_ls__gpio2, &dm81xx_l4_ls__elm, &dm81xx_l4_ls__mcspi1, + &dm814x_l4_ls__mmc1, + &dm814x_l4_ls__mmc2, &dm81xx_alwon_l3_fast__tpcc, &dm81xx_alwon_l3_fast__tptc0, &dm81xx_alwon_l3_fast__tptc1, @@ -1265,6 +1389,9 @@ static struct omap_hwmod_ocp_if *dm814x_hwmod_ocp_ifs[] __initdata = { &dm814x_l4_ls__timer2, &dm814x_l4_hs__cpgmac0, &dm814x_cpgmac0__mdio, + &dm81xx_alwon_l3_slow__gpmc, + &dm814x_default_l3_slow__usbss, + &dm814x_alwon_l3_med__mmc3, NULL, }; @@ -1298,6 +1425,7 @@ static struct omap_hwmod_ocp_if *dm816x_hwmod_ocp_ifs[] __initdata = { &dm816x_l4_ls__timer7, &dm81xx_l4_ls__mcspi1, &dm81xx_l4_ls__mailbox, + &dm81xx_l4_ls__spinbox, &dm81xx_l4_hs__emac0, &dm81xx_emac0__mdio, &dm816x_l4_hs__emac1, @@ -1311,7 +1439,7 @@ static struct omap_hwmod_ocp_if *dm816x_hwmod_ocp_ifs[] __initdata = { &dm81xx_tptc2__alwon_l3_fast, &dm81xx_tptc3__alwon_l3_fast, &dm81xx_alwon_l3_slow__gpmc, - &dm81xx_default_l3_slow__usbss, + &dm816x_default_l3_slow__usbss, NULL, }; diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c index 58144779dec4..e781e4fae13a 100644 --- a/arch/arm/mach-omap2/pdata-quirks.c +++ b/arch/arm/mach-omap2/pdata-quirks.c @@ -150,6 +150,21 @@ static struct platform_device wl18xx_device = { } }; +static struct ti_st_plat_data wilink7_pdata = { + .nshutdown_gpio = 162, + .dev_name = "/dev/ttyO1", + .flow_cntrl = 1, + .baud_rate = 300000, +}; + +static struct platform_device wl128x_device = { + .name = "kim", + .id = -1, + .dev = { + .platform_data = &wilink7_pdata, + } +}; + static struct platform_device btwilink_device = { .name = "btwilink", .id = -1, @@ -265,7 +280,7 @@ static void __init nokia_n900_legacy_init(void) pr_warn("Thumb binaries may crash randomly without this workaround\n"); } - pr_info("RX-51: Registring OMAP3 HWRNG device\n"); + pr_info("RX-51: Registering OMAP3 HWRNG device\n"); platform_device_register(&omap3_rom_rng_device); } @@ -276,6 +291,13 @@ static void __init omap3_tao3530_legacy_init(void) hsmmc2_internal_input_clk(); } +static void __init omap3_logicpd_torpedo_init(void) +{ + omap3_gpio126_127_129(); + platform_device_register(&wl128x_device); + platform_device_register(&btwilink_device); +} + /* omap3pandora legacy devices */ #define PANDORA_WIFI_IRQ_GPIO 21 #define PANDORA_WIFI_NRESET_GPIO 23 @@ -503,7 +525,7 @@ static struct pdata_init pdata_quirks[] __initdata = { { "nokia,omap3-n950", hsmmc2_internal_input_clk, }, { "isee,omap3-igep0020-rev-f", omap3_igep0020_rev_f_legacy_init, }, { "isee,omap3-igep0030-rev-g", omap3_igep0030_rev_g_legacy_init, }, - { "logicpd,dm3730-torpedo-devkit", omap3_gpio126_127_129, }, + { "logicpd,dm3730-torpedo-devkit", omap3_logicpd_torpedo_init, }, { "ti,omap3-evm-37xx", omap3_evm_legacy_init, }, { "ti,am3517-evm", am3517_evm_legacy_init, }, { "technexion,omap3-tao3530", omap3_tao3530_legacy_init, }, diff --git a/arch/arm/mach-omap2/powerdomains3xxx_data.c b/arch/arm/mach-omap2/powerdomains3xxx_data.c index 2e00c7f1f471..eb27ae066292 100644 --- a/arch/arm/mach-omap2/powerdomains3xxx_data.c +++ b/arch/arm/mach-omap2/powerdomains3xxx_data.c @@ -384,14 +384,14 @@ static struct powerdomain isp_814x_pwrdm = { .voltdm = { .name = "core" }, }; -static struct powerdomain active_816x_pwrdm = { +static struct powerdomain active_81xx_pwrdm = { .name = "active_pwrdm", .prcm_offs = TI816X_PRM_ACTIVE_MOD, .pwrsts = PWRSTS_OFF_ON, .voltdm = { .name = "core" }, }; -static struct powerdomain default_816x_pwrdm = { +static struct powerdomain default_81xx_pwrdm = { .name = "default_pwrdm", .prcm_offs = TI81XX_PRM_DEFAULT_MOD, .pwrsts = PWRSTS_OFF_ON, @@ -486,6 +486,8 @@ static struct powerdomain *powerdomains_am35x[] __initdata = { static struct powerdomain *powerdomains_ti814x[] __initdata = { &alwon_81xx_pwrdm, &device_81xx_pwrdm, + &active_81xx_pwrdm, + &default_81xx_pwrdm, &gem_814x_pwrdm, &ivahd_814x_pwrdm, &hdvpss_814x_pwrdm, @@ -497,8 +499,8 @@ static struct powerdomain *powerdomains_ti814x[] __initdata = { static struct powerdomain *powerdomains_ti816x[] __initdata = { &alwon_81xx_pwrdm, &device_81xx_pwrdm, - &active_816x_pwrdm, - &default_816x_pwrdm, + &active_81xx_pwrdm, + &default_81xx_pwrdm, &ivahd0_816x_pwrdm, &ivahd1_816x_pwrdm, &ivahd2_816x_pwrdm, diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index 3fc2cbe52113..5b2f5138d938 100644 --- a/arch/arm/mach-omap2/prm_common.c +++ b/arch/arm/mach-omap2/prm_common.c @@ -664,6 +664,13 @@ static struct omap_prcm_init_data am3_prm_data __initdata = { }; #endif +#ifdef CONFIG_SOC_TI81XX +static struct omap_prcm_init_data dm814_pllss_data __initdata = { + .index = TI_CLKM_PLLSS, + .init = am33xx_prm_init, +}; +#endif + #ifdef CONFIG_ARCH_OMAP4 static struct omap_prcm_init_data omap4_prm_data __initdata = { .index = TI_CLKM_PRM, @@ -715,6 +722,7 @@ static const struct of_device_id const omap_prcm_dt_match_table[] __initconst = #endif #ifdef CONFIG_SOC_TI81XX { .compatible = "ti,dm814-prcm", .data = &am3_prm_data }, + { .compatible = "ti,dm814-pllss", .data = &dm814_pllss_data }, { .compatible = "ti,dm816-prcm", .data = &am3_prm_data }, #endif #ifdef CONFIG_ARCH_OMAP2 diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index 5fb50fe54153..f164c6b32ce2 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c @@ -213,7 +213,7 @@ static int __init omap_serial_early_init(void) return 0; } -omap_core_initcall(omap_serial_early_init); +omap_postcore_initcall(omap_serial_early_init); /** * omap_serial_init_port() - initialize single serial port diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c index f86692dbcfd5..5b385bb8aff9 100644 --- a/arch/arm/mach-omap2/timer.c +++ b/arch/arm/mach-omap2/timer.c @@ -194,8 +194,8 @@ static struct device_node * __init omap_get_timer_dt(const struct of_device_id * /** * omap_dmtimer_init - initialisation function when device tree is used * - * For secure OMAP3 devices, timers with device type "timer-secure" cannot - * be used by the kernel as they are reserved. Therefore, to prevent the + * For secure OMAP3/DRA7xx devices, timers with device type "timer-secure" + * cannot be used by the kernel as they are reserved. Therefore, to prevent the * kernel registering these devices remove them dynamically from the device * tree on boot. */ @@ -203,7 +203,7 @@ static void __init omap_dmtimer_init(void) { struct device_node *np; - if (!cpu_is_omap34xx()) + if (!cpu_is_omap34xx() && !soc_is_dra7xx()) return; /* If we are a secure device, remove any secure timer nodes */ |