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Diffstat (limited to 'arch/arm/boot/dts/rv1108.dtsi')
-rw-r--r--arch/arm/boot/dts/rv1108.dtsi369
1 files changed, 359 insertions, 10 deletions
diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi
index 437098b556eb..e7cd1315db1b 100644
--- a/arch/arm/boot/dts/rv1108.dtsi
+++ b/arch/arm/boot/dts/rv1108.dtsi
@@ -52,6 +52,10 @@
interrupt-parent = <&gic>;
aliases {
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ i2c3 = &i2c3;
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
@@ -65,6 +69,33 @@
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0xf00>;
+ clocks = <&cru ARMCLK>;
+ operating-points-v2 = <&cpu_opp_table>;
+ };
+ };
+
+ cpu_opp_table: opp_table {
+ compatible = "operating-points-v2";
+
+ opp-408000000 {
+ opp-hz = /bits/ 64 <408000000>;
+ opp-microvolt = <975000>;
+ clock-latency-ns = <40000>;
+ };
+ opp-600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <975000>;
+ clock-latency-ns = <40000>;
+ };
+ opp-816000000 {
+ opp-hz = /bits/ 64 <816000000>;
+ opp-microvolt = <1025000>;
+ clock-latency-ns = <40000>;
+ };
+ opp-1008000000 {
+ opp-hz = /bits/ 64 <1008000000>;
+ opp-microvolt = <1150000>;
+ clock-latency-ns = <40000>;
};
};
@@ -154,9 +185,221 @@
status = "disabled";
};
+ i2c1: i2c@10240000 {
+ compatible = "rockchip,rv1108-i2c";
+ reg = <0x10240000 0x1000>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cru SCLK_I2C1>, <&cru PCLK_I2C1>;
+ clock-names = "i2c", "pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_xfer>;
+ rockchip,grf = <&grf>;
+ status = "disabled";
+ };
+
+ i2c2: i2c@10250000 {
+ compatible = "rockchip,rv1108-i2c";
+ reg = <0x10250000 0x1000>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cru SCLK_I2C2>, <&cru PCLK_I2C2>;
+ clock-names = "i2c", "pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2m1_xfer>;
+ rockchip,grf = <&grf>;
+ status = "disabled";
+ };
+
+ i2c3: i2c@10260000 {
+ compatible = "rockchip,rv1108-i2c";
+ reg = <0x10260000 0x1000>;
+ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cru SCLK_I2C3>, <&cru PCLK_I2C3>;
+ clock-names = "i2c", "pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c3_xfer>;
+ rockchip,grf = <&grf>;
+ status = "disabled";
+ };
+
+ spi: spi@10270000 {
+ compatible = "rockchip,rv1108-spi";
+ reg = <0x10270000 0x1000>;
+ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_SPI>, <&cru PCLK_SPI>;
+ clock-names = "spiclk", "apb_pclk";
+ dmas = <&pdma 8>, <&pdma 9>;
+ #dma-cells = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ pwm4: pwm@10280000 {
+ compatible = "rockchip,rv1108-pwm", "rockchip,rk3288-pwm";
+ reg = <0x10280000 0x10>;
+ interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
+ clock-names = "pwm", "pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm4_pin>;
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ pwm5: pwm@10280010 {
+ compatible = "rockchip,rv1108-pwm", "rockchip,rk3288-pwm";
+ reg = <0x10280010 0x10>;
+ interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
+ clock-names = "pwm", "pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm5_pin>;
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ pwm6: pwm@10280020 {
+ compatible = "rockchip,rv1108-pwm", "rockchip,rk3288-pwm";
+ reg = <0x10280020 0x10>;
+ interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
+ clock-names = "pwm", "pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm6_pin>;
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ pwm7: pwm@10280030 {
+ compatible = "rockchip,rv1108-pwm", "rockchip,rk3288-pwm";
+ reg = <0x10280030 0x10>;
+ interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
+ clock-names = "pwm", "pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm7_pin>;
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
grf: syscon@10300000 {
- compatible = "rockchip,rv1108-grf", "syscon";
+ compatible = "rockchip,rv1108-grf", "syscon", "simple-mfd";
reg = <0x10300000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ u2phy: usb2-phy@100 {
+ compatible = "rockchip,rv1108-usb2phy";
+ reg = <0x100 0x0c>;
+ clocks = <&cru SCLK_USBPHY>;
+ clock-names = "phyclk";
+ #clock-cells = <0>;
+ clock-output-names = "usbphy";
+ rockchip,usbgrf = <&usbgrf>;
+ status = "disabled";
+
+ u2phy_otg: otg-port {
+ interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "otg-mux";
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+
+ u2phy_host: host-port {
+ interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "linestate";
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+ };
+ };
+
+ watchdog: wdt@10360000 {
+ compatible = "snps,dw-wdt";
+ reg = <0x10360000 0x100>;
+ interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru PCLK_WDT>;
+ clock-names = "pclk_wdt";
+ status = "disabled";
+ };
+
+ adc: adc@1038c000 {
+ compatible = "rockchip,rv1108-saradc", "rockchip,rk3399-saradc";
+ reg = <0x1038c000 0x100>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ #io-channel-cells = <1>;
+ clock-frequency = <1000000>;
+ clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
+ clock-names = "saradc", "apb_pclk";
+ status = "disabled";
+ };
+
+ i2c0: i2c@20000000 {
+ compatible = "rockchip,rv1108-i2c";
+ reg = <0x20000000 0x1000>;
+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cru SCLK_I2C0_PMU>, <&cru PCLK_I2C0_PMU>;
+ clock-names = "i2c", "pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_xfer>;
+ rockchip,grf = <&grf>;
+ status = "disabled";
+ };
+
+ pwm0: pwm@20040000 {
+ compatible = "rockchip,rv1108-pwm", "rockchip,rk3288-pwm";
+ reg = <0x20040000 0x10>;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_PWM0_PMU>, <&cru PCLK_PWM0_PMU>;
+ clock-names = "pwm", "pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm0_pin>;
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ pwm1: pwm@20040010 {
+ compatible = "rockchip,rv1108-pwm", "rockchip,rk3288-pwm";
+ reg = <0x20040010 0x10>;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_PWM0_PMU>, <&cru PCLK_PWM0_PMU>;
+ clock-names = "pwm", "pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm1_pin>;
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ pwm2: pwm@20040020 {
+ compatible = "rockchip,rv1108-pwm", "rockchip,rk3288-pwm";
+ reg = <0x20040020 0x10>;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_PWM0_PMU>, <&cru PCLK_PWM0_PMU>;
+ clock-names = "pwm", "pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm2_pin>;
+ #pwm-cells = <3>;
+ status = "disabled";
+ };
+
+ pwm3: pwm@20040030 {
+ compatible = "rockchip,rv1108-pwm", "rockchip,rk3288-pwm";
+ reg = <0x20040030 0x10>;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_PWM0_PMU>, <&cru PCLK_PWM0_PMU>;
+ clock-names = "pwm", "pclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm3_pin>;
+ #pwm-cells = <3>;
+ status = "disabled";
};
pmugrf: syscon@20060000 {
@@ -164,6 +407,11 @@
reg = <0x20060000 0x1000>;
};
+ usbgrf: syscon@202a0000 {
+ compatible = "rockchip,rv1108-usbgrf", "syscon";
+ reg = <0x202a0000 0x1000>;
+ };
+
cru: clock-controller@20200000 {
compatible = "rockchip,rv1108-cru";
reg = <0x20200000 0x1000>;
@@ -174,37 +422,78 @@
emmc: dwmmc@30110000 {
compatible = "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc";
- clock-freq-min-max = <400000 150000000>;
+ reg = <0x30110000 0x4000>;
+ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
<&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
- interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x30110000 0x4000>;
+ max-frequency = <150000000>;
status = "disabled";
};
sdio: dwmmc@30120000 {
compatible = "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc";
- clock-freq-min-max = <400000 150000000>;
+ reg = <0x30120000 0x4000>;
+ interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
<&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
- interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x30120000 0x4000>;
+ max-frequency = <150000000>;
status = "disabled";
};
sdmmc: dwmmc@30130000 {
compatible = "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc";
- clock-freq-min-max = <400000 100000000>;
+ reg = <0x30130000 0x4000>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
<&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
fifo-depth = <0x100>;
- interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
- reg = <0x30130000 0x4000>;
+ max-frequency = <100000000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
+ status = "disabled";
+ };
+
+ usb_host_ehci: usb@30140000 {
+ compatible = "generic-ehci";
+ reg = <0x30140000 0x20000>;
+ interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru HCLK_HOST0>, <&u2phy>;
+ clock-names = "usbhost", "utmi";
+ phys = <&u2phy_host>;
+ phy-names = "usb";
+ status = "disabled";
+ };
+
+ usb_host_ohci: usb@30160000 {
+ compatible = "generic-ohci";
+ reg = <0x30160000 0x20000>;
+ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru HCLK_HOST0>, <&u2phy>;
+ clock-names = "usbhost", "utmi";
+ phys = <&u2phy_host>;
+ phy-names = "usb";
+ status = "disabled";
+ };
+
+ usb_otg: usb@30180000 {
+ compatible = "rockchip,rv1108-usb", "rockchip,rk3066-usb",
+ "snps,dwc2";
+ reg = <0x30180000 0x40000>;
+ interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru HCLK_OTG>;
+ clock-names = "otg";
+ dr_mode = "otg";
+ g-np-tx-fifo-size = <16>;
+ g-rx-fifo-size = <280>;
+ g-tx-fifo-size = <256 128 128 64 32 16>;
+ g-use-dma;
+ phys = <&u2phy_otg>;
+ phy-names = "usb2-phy";
status = "disabled";
};
@@ -301,6 +590,11 @@
drive-strength = <12>;
};
+ pcfg_pull_none_smt: pcfg-pull-none-smt {
+ bias-disable;
+ input-schmitt-enable;
+ };
+
pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {
bias-pull-up;
drive-strength = <8>;
@@ -328,6 +622,13 @@
input-enable;
};
+ i2c0 {
+ i2c0_xfer: i2c0-xfer {
+ rockchip,pins = <0 RK_PB1 RK_FUNC_1 &pcfg_pull_none_smt>,
+ <0 RK_PB2 RK_FUNC_1 &pcfg_pull_none_smt>;
+ };
+ };
+
i2c1 {
i2c1_xfer: i2c1-xfer {
rockchip,pins = <2 RK_PD3 RK_FUNC_1 &pcfg_pull_up>,
@@ -366,6 +667,54 @@
};
};
+ pwm0 {
+ pwm0_pin: pwm0-pin {
+ rockchip,pins = <0 RK_PC5 RK_FUNC_1 &pcfg_pull_none>;
+ };
+ };
+
+ pwm1 {
+ pwm1_pin: pwm1-pin {
+ rockchip,pins = <0 RK_PC4 RK_FUNC_1 &pcfg_pull_none>;
+ };
+ };
+
+ pwm2 {
+ pwm2_pin: pwm2-pin {
+ rockchip,pins = <0 RK_PC6 RK_FUNC_1 &pcfg_pull_none>;
+ };
+ };
+
+ pwm3 {
+ pwm3_pin: pwm3-pin {
+ rockchip,pins = <0 RK_PC0 RK_FUNC_1 &pcfg_pull_none>;
+ };
+ };
+
+ pwm4 {
+ pwm4_pin: pwm4-pin {
+ rockchip,pins = <1 RK_PC1 RK_FUNC_3 &pcfg_pull_none>;
+ };
+ };
+
+ pwm5 {
+ pwm5_pin: pwm5-pin {
+ rockchip,pins = <1 RK_PA7 RK_FUNC_2 &pcfg_pull_none>;
+ };
+ };
+
+ pwm6 {
+ pwm6_pin: pwm6-pin {
+ rockchip,pins = <1 RK_PB0 RK_FUNC_2 &pcfg_pull_none>;
+ };
+ };
+
+ pwm7 {
+ pwm7_pin: pwm7-pin {
+ rockchip,pins = <1 RK_PB1 RK_FUNC_2 &pcfg_pull_none>;
+ };
+ };
+
sdmmc {
sdmmc_clk: sdmmc-clk {
rockchip,pins = <3 RK_PC4 RK_FUNC_1 &pcfg_pull_none_drv_4ma>;
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-23 15:14:38 +0000