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authorLinus Torvalds <torvalds@linux-foundation.org>2014-06-02 16:34:00 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2014-06-02 16:34:00 -0700
commit755a9ba7bf24a45b6dbf8bb15a5a56c8ed12461a (patch)
treead98ee0f336630144e571c9499453c571c6b02c7 /include
parent7477838f2e481256a40e0c44b92f9bccb065bc51 (diff)
parent0f16aa3c24a216d14d7f0587e1cbd2c1b51a38f3 (diff)
Merge tag 'dt-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc into next
Pull ARM SoC devicetree updates from Olof Johansson: "As with previous release, this continues to be among the largest branches we merge, with lots of new contents. New things for this release are among other things: - DTSI contents for the new SoCs supported in 3.16 (see SoC pull request) - Qualcomm APQ8064 and APQ8084 SoCs and eval boards - Nvidia Jetson TK1 development board (Tegra T124-based) Two new SoCs that didn't need enough new platform code to stand out enough for me to notice when writing the SoC tag, but that adds new DT contents are: - TI DRA72 - Marvell Berlin 2Q" * tag 'dt-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (500 commits) ARM: dts: add secure firmware support for exynos5420-arndale-octa ARM: dts: add pmu sysreg node to exynos3250 ARM: dts: correct the usb phy node in exynos5800-peach-pi ARM: dts: correct the usb phy node in exynos5420-peach-pit ARM: dts: add dts files for exynos5410 and exynos5410-smdk5410 ARM: dts: add dts files for exynos3250 SoC ARM: dts: add mfc node for exynos5800 ARM: dts: add Vbus regulator for USB 3.0 on exynos5800-peach-pi ARM: dts: enable fimd for exynos5800-peach-pi ARM: dts: enable display controller for exynos5800-peach-pi ARM: dts: enable hdmi for exynos5800-peach-pi ARM: dts: add dts file for exynos5800-peach-pi board ARM: dts: add dts file for exynos5800 SoC ARM: dts: add dts file for exynos5260-xyref5260 board ARM: dts: add dts files for exynos5260 SoC ARM: dts: update watchdog node name in exynos5440 ARM: dts: use key code macros on Origen and Arndale boards ARM: dts: enable RTC and WDT nodes on Origen boards ARM: dts: qcom: Add APQ8084-MTP board support ARM: dts: qcom: Add APQ8084 SoC support ...
Diffstat (limited to 'include')
-rw-r--r--include/dt-bindings/clock/berlin2.h45
-rw-r--r--include/dt-bindings/clock/berlin2q.h31
-rw-r--r--include/dt-bindings/clock/r8a7790-clock.h3
-rw-r--r--include/dt-bindings/clock/r8a7791-clock.h3
-rw-r--r--include/dt-bindings/clock/stih415-clks.h15
-rw-r--r--include/dt-bindings/clock/stih416-clks.h15
-rw-r--r--include/dt-bindings/pinctrl/omap.h13
-rw-r--r--include/dt-bindings/reset-controller/stih415-resets.h1
-rw-r--r--include/dt-bindings/reset-controller/stih416-resets.h1
-rw-r--r--include/dt-bindings/reset/altr,rst-mgr.h90
-rw-r--r--include/dt-bindings/soc/qcom,gsbi.h26
11 files changed, 239 insertions, 4 deletions
diff --git a/include/dt-bindings/clock/berlin2.h b/include/dt-bindings/clock/berlin2.h
new file mode 100644
index 000000000000..0c30800175df
--- /dev/null
+++ b/include/dt-bindings/clock/berlin2.h
@@ -0,0 +1,45 @@
+/*
+ * Berlin2 BG2/BG2CD clock tree IDs
+ */
+
+#define CLKID_SYS 0
+#define CLKID_CPU 1
+#define CLKID_DRMFIGO 2
+#define CLKID_CFG 3
+#define CLKID_GFX 4
+#define CLKID_ZSP 5
+#define CLKID_PERIF 6
+#define CLKID_PCUBE 7
+#define CLKID_VSCOPE 8
+#define CLKID_NFC_ECC 9
+#define CLKID_VPP 10
+#define CLKID_APP 11
+#define CLKID_AUDIO0 12
+#define CLKID_AUDIO2 13
+#define CLKID_AUDIO3 14
+#define CLKID_AUDIO1 15
+#define CLKID_GFX3D_CORE 16
+#define CLKID_GFX3D_SYS 17
+#define CLKID_ARC 18
+#define CLKID_VIP 19
+#define CLKID_SDIO0XIN 20
+#define CLKID_SDIO1XIN 21
+#define CLKID_GFX3D_EXTRA 22
+#define CLKID_GC360 23
+#define CLKID_SDIO_DLLMST 24
+#define CLKID_GETH0 25
+#define CLKID_GETH1 26
+#define CLKID_SATA 27
+#define CLKID_AHBAPB 28
+#define CLKID_USB0 29
+#define CLKID_USB1 30
+#define CLKID_PBRIDGE 31
+#define CLKID_SDIO0 32
+#define CLKID_SDIO1 33
+#define CLKID_NFC 34
+#define CLKID_SMEMC 35
+#define CLKID_AUDIOHD 36
+#define CLKID_VIDEO0 37
+#define CLKID_VIDEO1 38
+#define CLKID_VIDEO2 39
+#define CLKID_TWD 40
diff --git a/include/dt-bindings/clock/berlin2q.h b/include/dt-bindings/clock/berlin2q.h
new file mode 100644
index 000000000000..287fc3b4afb2
--- /dev/null
+++ b/include/dt-bindings/clock/berlin2q.h
@@ -0,0 +1,31 @@
+/*
+ * Berlin2 BG2Q clock tree IDs
+ */
+
+#define CLKID_SYS 0
+#define CLKID_DRMFIGO 1
+#define CLKID_CFG 2
+#define CLKID_GFX2D 3
+#define CLKID_ZSP 4
+#define CLKID_PERIF 5
+#define CLKID_PCUBE 6
+#define CLKID_VSCOPE 7
+#define CLKID_NFC_ECC 8
+#define CLKID_VPP 9
+#define CLKID_APP 10
+#define CLKID_SDIO0XIN 11
+#define CLKID_SDIO1XIN 12
+#define CLKID_GFX2DAXI 13
+#define CLKID_GETH0 14
+#define CLKID_SATA 15
+#define CLKID_AHBAPB 16
+#define CLKID_USB0 17
+#define CLKID_USB1 18
+#define CLKID_USB2 19
+#define CLKID_USB3 20
+#define CLKID_PBRIDGE 21
+#define CLKID_SDIO 22
+#define CLKID_NFC 23
+#define CLKID_SMEMC 24
+#define CLKID_PCIE 25
+#define CLKID_TWD 26
diff --git a/include/dt-bindings/clock/r8a7790-clock.h b/include/dt-bindings/clock/r8a7790-clock.h
index 9a7c4c5a35d1..1118f7a4bca6 100644
--- a/include/dt-bindings/clock/r8a7790-clock.h
+++ b/include/dt-bindings/clock/r8a7790-clock.h
@@ -50,6 +50,7 @@
#define R8A7790_CLK_SYS_DMAC0 19
/* MSTP3 */
+#define R8A7790_CLK_IIC2 0
#define R8A7790_CLK_TPU0 4
#define R8A7790_CLK_MMCIF1 5
#define R8A7790_CLK_SDHI3 11
@@ -57,6 +58,8 @@
#define R8A7790_CLK_SDHI1 13
#define R8A7790_CLK_SDHI0 14
#define R8A7790_CLK_MMCIF0 15
+#define R8A7790_CLK_IIC0 18
+#define R8A7790_CLK_IIC1 23
#define R8A7790_CLK_SSUSB 28
#define R8A7790_CLK_CMT1 29
#define R8A7790_CLK_USBDMAC0 30
diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h
index c3b0130f56c8..b050d18437ce 100644
--- a/include/dt-bindings/clock/r8a7791-clock.h
+++ b/include/dt-bindings/clock/r8a7791-clock.h
@@ -52,6 +52,8 @@
#define R8A7791_CLK_SDHI1 12
#define R8A7791_CLK_SDHI0 14
#define R8A7791_CLK_MMCIF0 15
+#define R8A7791_CLK_IIC0 18
+#define R8A7791_CLK_IIC1 23
#define R8A7791_CLK_SSUSB 28
#define R8A7791_CLK_CMT1 29
#define R8A7791_CLK_USBDMAC0 30
@@ -62,6 +64,7 @@
#define R8A7791_CLK_PWM 23
/* MSTP7 */
+#define R8A7791_CLK_EHCI 3
#define R8A7791_CLK_HSUSB 4
#define R8A7791_CLK_HSCIF2 13
#define R8A7791_CLK_SCIF5 14
diff --git a/include/dt-bindings/clock/stih415-clks.h b/include/dt-bindings/clock/stih415-clks.h
new file mode 100644
index 000000000000..0d2c7397e028
--- /dev/null
+++ b/include/dt-bindings/clock/stih415-clks.h
@@ -0,0 +1,15 @@
+/*
+ * This header provides constants clk index STMicroelectronics
+ * STiH415 SoC.
+ */
+#ifndef _CLK_STIH415
+#define _CLK_STIH415
+
+/* CLOCKGEN A0 */
+#define CLK_ICN_REG 0
+#define CLK_ETH1_PHY 4
+
+/* CLOCKGEN A1 */
+#define CLK_GMAC0_PHY 3
+
+#endif
diff --git a/include/dt-bindings/clock/stih416-clks.h b/include/dt-bindings/clock/stih416-clks.h
new file mode 100644
index 000000000000..552c779eb6af
--- /dev/null
+++ b/include/dt-bindings/clock/stih416-clks.h
@@ -0,0 +1,15 @@
+/*
+ * This header provides constants clk index STMicroelectronics
+ * STiH416 SoC.
+ */
+#ifndef _CLK_STIH416
+#define _CLK_STIH416
+
+/* CLOCKGEN A0 */
+#define CLK_ICN_REG 0
+#define CLK_ETH1_PHY 4
+
+/* CLOCKGEN A1 */
+#define CLK_GMAC0_PHY 3
+
+#endif
diff --git a/include/dt-bindings/pinctrl/omap.h b/include/dt-bindings/pinctrl/omap.h
index 404ba7ef7813..1c75b8ca5228 100644
--- a/include/dt-bindings/pinctrl/omap.h
+++ b/include/dt-bindings/pinctrl/omap.h
@@ -62,14 +62,19 @@
#define OMAP3630_CORE2_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x25a0) (val)
#define OMAP3_WKUP_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2a00) (val)
#define AM33XX_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
-#define OMAP4_CORE_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0040) (val)
-#define OMAP4_WKUP_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0xe040) (val)
#define AM4372_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
-#define OMAP5_CORE_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2840) (val)
-#define OMAP5_WKUP_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0xc840) (val)
#define DRA7XX_CORE_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x3400) (val)
/*
+ * Macros to allow using the offset from the padconf physical address
+ * instead of the offset from padconf base.
+ */
+#define OMAP_PADCONF_OFFSET(offset, base_offset) ((offset) - (base_offset))
+
+#define OMAP4_IOPAD(offset, val) OMAP_PADCONF_OFFSET((offset), 0x0040) (val)
+#define OMAP5_IOPAD(offset, val) OMAP_PADCONF_OFFSET((offset), 0x0040) (val)
+
+/*
* Define some commonly used pins configured by the boards.
* Note that some boards use alternative pins, so check
* the schematics before using these.
diff --git a/include/dt-bindings/reset-controller/stih415-resets.h b/include/dt-bindings/reset-controller/stih415-resets.h
index c2f8a66913c5..c2329fe29cf6 100644
--- a/include/dt-bindings/reset-controller/stih415-resets.h
+++ b/include/dt-bindings/reset-controller/stih415-resets.h
@@ -22,5 +22,6 @@
#define STIH415_USB0_SOFTRESET 3
#define STIH415_USB1_SOFTRESET 4
#define STIH415_USB2_SOFTRESET 5
+#define STIH415_KEYSCAN_SOFTRESET 6
#endif /* _DT_BINDINGS_RESET_CONTROLLER_STIH415 */
diff --git a/include/dt-bindings/reset-controller/stih416-resets.h b/include/dt-bindings/reset-controller/stih416-resets.h
index 2127743f23e3..fcf9af1ac0b2 100644
--- a/include/dt-bindings/reset-controller/stih416-resets.h
+++ b/include/dt-bindings/reset-controller/stih416-resets.h
@@ -46,5 +46,6 @@
#define STIH416_COMPO_A_SOFTRESET 25
#define STIH416_VP8_DEC_SOFTRESET 26
#define STIH416_VTG_MAIN_SOFTRESET 27
+#define STIH416_KEYSCAN_SOFTRESET 28
#endif /* _DT_BINDINGS_RESET_CONTROLLER_STIH416 */
diff --git a/include/dt-bindings/reset/altr,rst-mgr.h b/include/dt-bindings/reset/altr,rst-mgr.h
new file mode 100644
index 000000000000..3f04908fb87c
--- /dev/null
+++ b/include/dt-bindings/reset/altr,rst-mgr.h
@@ -0,0 +1,90 @@
+/*
+ * Copyright (c) 2014, Steffen Trumtrar <s.trumtrar@pengutronix.de>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _DT_BINDINGS_RESET_ALTR_RST_MGR_H
+#define _DT_BINDINGS_RESET_ALTR_RST_MGR_H
+
+/* MPUMODRST */
+#define CPU0_RESET 0
+#define CPU1_RESET 1
+#define WDS_RESET 2
+#define SCUPER_RESET 3
+#define L2_RESET 4
+
+/* PERMODRST */
+#define EMAC0_RESET 32
+#define EMAC1_RESET 33
+#define USB0_RESET 34
+#define USB1_RESET 35
+#define NAND_RESET 36
+#define QSPI_RESET 37
+#define L4WD0_RESET 38
+#define L4WD1_RESET 39
+#define OSC1TIMER0_RESET 40
+#define OSC1TIMER1_RESET 41
+#define SPTIMER0_RESET 42
+#define SPTIMER1_RESET 43
+#define I2C0_RESET 44
+#define I2C1_RESET 45
+#define I2C2_RESET 46
+#define I2C3_RESET 47
+#define UART0_RESET 48
+#define UART1_RESET 49
+#define SPIM0_RESET 50
+#define SPIM1_RESET 51
+#define SPIS0_RESET 52
+#define SPIS1_RESET 53
+#define SDMMC_RESET 54
+#define CAN0_RESET 55
+#define CAN1_RESET 56
+#define GPIO0_RESET 57
+#define GPIO1_RESET 58
+#define GPIO2_RESET 59
+#define DMA_RESET 60
+#define SDR_RESET 61
+
+/* PER2MODRST */
+#define DMAIF0_RESET 64
+#define DMAIF1_RESET 65
+#define DMAIF2_RESET 66
+#define DMAIF3_RESET 67
+#define DMAIF4_RESET 68
+#define DMAIF5_RESET 69
+#define DMAIF6_RESET 70
+#define DMAIF7_RESET 71
+
+/* BRGMODRST */
+#define HPS2FPGA_RESET 96
+#define LWHPS2FPGA_RESET 97
+#define FPGA2HPS_RESET 98
+
+/* MISCMODRST*/
+#define ROM_RESET 128
+#define OCRAM_RESET 129
+#define SYSMGR_RESET 130
+#define SYSMGRCOLD_RESET 131
+#define FPGAMGR_RESET 132
+#define ACPIDMAP_RESET 133
+#define S2F_RESET 134
+#define S2FCOLD_RESET 135
+#define NRSTPIN_RESET 136
+#define TIMESTAMPCOLD_RESET 137
+#define CLKMGRCOLD_RESET 138
+#define SCANMGR_RESET 139
+#define FRZCTRLCOLD_RESET 140
+#define SYSDBG_RESET 141
+#define DBG_RESET 142
+#define TAPCOLD_RESET 143
+#define SDRCOLD_RESET 144
+
+#endif
diff --git a/include/dt-bindings/soc/qcom,gsbi.h b/include/dt-bindings/soc/qcom,gsbi.h
new file mode 100644
index 000000000000..7ac4292333aa
--- /dev/null
+++ b/include/dt-bindings/soc/qcom,gsbi.h
@@ -0,0 +1,26 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#ifndef __DT_BINDINGS_QCOM_GSBI_H
+#define __DT_BINDINGS_QCOM_GSBI_H
+
+#define GSBI_PROT_IDLE 0
+#define GSBI_PROT_I2C_UIM 1
+#define GSBI_PROT_I2C 2
+#define GSBI_PROT_SPI 3
+#define GSBI_PROT_UART_W_FC 4
+#define GSBI_PROT_UIM 5
+#define GSBI_PROT_I2C_UART 6
+
+#define GSBI_CRCI_QUP 0
+#define GSBI_CRCI_UART 1
+
+#endif