diff options
author | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2022-01-03 17:24:12 +0100 |
---|---|---|
committer | Mauro Carvalho Chehab <mchehab@kernel.org> | 2022-02-17 09:52:32 +0100 |
commit | 20c238dfb26c23dc493e5fcfeea682af8b33375a (patch) | |
tree | 58116d61eda15dda74ad21e659b0152ed40db467 /include/media | |
parent | 6a7bdd89f50d399dd02847e6f398d408b086df50 (diff) |
media: v4l2-mediabus: Drop legacy V4L2_MBUS_CSI2_*_LANE flags
The V4L2_MBUS_CSI2_*_LANE flags are a legacy API and are unused. Drop
them.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
Diffstat (limited to 'include/media')
-rw-r--r-- | include/media/v4l2-mediabus.h | 11 |
1 files changed, 0 insertions, 11 deletions
diff --git a/include/media/v4l2-mediabus.h b/include/media/v4l2-mediabus.h index 269aaf57ba32..44195ceeccca 100644 --- a/include/media/v4l2-mediabus.h +++ b/include/media/v4l2-mediabus.h @@ -21,8 +21,6 @@ * clear both the V4L2_MBUS_HSYNC_ACTIVE_HIGH and the * V4L2_MBUS_HSYNC_ACTIVE_LOW flag at the same time. Instead either flag * V4L2_MBUS_HSYNC_ACTIVE_HIGH or flag V4L2_MBUS_HSYNC_ACTIVE_LOW shall be set. - * The same is true for the V4L2_MBUS_CSI2_1/2/3/4_LANE flags group: only one - * of these four bits shall be set. * * TODO: replace the existing V4L2_MBUS_* flags with structures of fields * to avoid conflicting settings. @@ -69,11 +67,6 @@ #define V4L2_MBUS_DATA_ENABLE_LOW BIT(15) /* Serial flags */ -/* CSI-2 D-PHY number of data lanes. */ -#define V4L2_MBUS_CSI2_1_LANE BIT(0) -#define V4L2_MBUS_CSI2_2_LANE BIT(1) -#define V4L2_MBUS_CSI2_3_LANE BIT(2) -#define V4L2_MBUS_CSI2_4_LANE BIT(3) /* CSI-2 Virtual Channel identifiers. */ #define V4L2_MBUS_CSI2_CHANNEL_0 BIT(4) #define V4L2_MBUS_CSI2_CHANNEL_1 BIT(5) @@ -83,10 +76,6 @@ #define V4L2_MBUS_CSI2_CONTINUOUS_CLOCK BIT(8) #define V4L2_MBUS_CSI2_NONCONTINUOUS_CLOCK BIT(9) -#define V4L2_MBUS_CSI2_LANES (V4L2_MBUS_CSI2_1_LANE | \ - V4L2_MBUS_CSI2_2_LANE | \ - V4L2_MBUS_CSI2_3_LANE | \ - V4L2_MBUS_CSI2_4_LANE) #define V4L2_MBUS_CSI2_CHANNELS (V4L2_MBUS_CSI2_CHANNEL_0 | \ V4L2_MBUS_CSI2_CHANNEL_1 | \ V4L2_MBUS_CSI2_CHANNEL_2 | \ |