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authorSergey Matyukevich <sergey.matyukevich@syntacore.com>2022-08-30 18:53:05 +0300
committerPalmer Dabbelt <palmer@rivosinc.com>2022-09-08 13:34:50 -0700
commit1537bf26e212ffcf007d0590958025f6bfdd4ac8 (patch)
treeb2a498f8d14239173d11ee1a97a7911b356504e9 /include/linux/perf
parent82c75dca6f95c9ac4649031a493456156ddfec2f (diff)
perf: RISC-V: exclude invalid pmu counters from SBI calls
SBI firmware may not provide information for some counters in response to SBI_EXT_PMU_COUNTER_GET_INFO call. Exclude such counters from the subsequent SBI requests. For this purpose use global mask to keep track of fully specified counters. Signed-off-by: Sergey Matyukevich <sergey.matyukevich@syntacore.com> Reviewed-by: Atish Patra <atishp@rivosinc.com> Link: https://lore.kernel.org/r/20220830155306.301714-3-geomatsi@gmail.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'include/linux/perf')
-rw-r--r--include/linux/perf/riscv_pmu.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/linux/perf/riscv_pmu.h b/include/linux/perf/riscv_pmu.h
index bf66fe011fa8..e17e86ad6f3a 100644
--- a/include/linux/perf/riscv_pmu.h
+++ b/include/linux/perf/riscv_pmu.h
@@ -45,7 +45,7 @@ struct riscv_pmu {
irqreturn_t (*handle_irq)(int irq_num, void *dev);
- int num_counters;
+ unsigned long cmask;
u64 (*ctr_read)(struct perf_event *event);
int (*ctr_get_idx)(struct perf_event *event);
int (*ctr_get_width)(int idx);