diff options
| author | Paul Mundt <lethal@linux-sh.org> | 2006-09-27 18:22:53 +0900 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2006-09-27 18:22:53 +0900 |
| commit | 315bb96824149614efe4844ded077a13fc908880 (patch) | |
| tree | 3a8db24ec8554d8e56b1460d85cc81b34299b0d7 /include/asm-sh | |
| parent | a6a31139897a5e539efe7ad3b7bd351fa9673ce8 (diff) | |
sh: CPU flags in AT_HWCAP in ELF auxvt.
Encode processor flags in AT_HWCAP in the ELF auxiliary vector.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include/asm-sh')
| -rw-r--r-- | include/asm-sh/cpu-features.h | 15 | ||||
| -rw-r--r-- | include/asm-sh/elf.h | 10 | ||||
| -rw-r--r-- | include/asm-sh/processor.h | 12 |
3 files changed, 22 insertions, 15 deletions
diff --git a/include/asm-sh/cpu-features.h b/include/asm-sh/cpu-features.h new file mode 100644 index 000000000000..e398947ec01d --- /dev/null +++ b/include/asm-sh/cpu-features.h @@ -0,0 +1,15 @@ +#ifndef __ASM_SH_CPU_FEATURES_H +#define __ASM_SH_CPU_FEATURES_H + +/* + * Processor flags + */ +#define CPU_HAS_FPU 0x0001 /* Hardware FPU support */ +#define CPU_HAS_P2_FLUSH_BUG 0x0002 /* Need to flush the cache in P2 area */ +#define CPU_HAS_MMU_PAGE_ASSOC 0x0004 /* SH3: TLB way selection bit support */ +#define CPU_HAS_DSP 0x0008 /* SH-DSP: DSP support */ +#define CPU_HAS_PERF_COUNTER 0x0010 /* Hardware performance counters */ +#define CPU_HAS_PTEA 0x0020 /* PTEA register */ +#define CPU_HAS_LLSC 0x0040 /* movli.l/movco.l */ + +#endif /* __ASM_SH_CPU_FEATURES_H */ diff --git a/include/asm-sh/elf.h b/include/asm-sh/elf.h index 1b63dfeea4f2..cc8e5e767345 100644 --- a/include/asm-sh/elf.h +++ b/include/asm-sh/elf.h @@ -1,6 +1,11 @@ #ifndef __ASM_SH_ELF_H #define __ASM_SH_ELF_H +#include <asm/processor.h> +#include <asm/auxvec.h> +#include <asm/ptrace.h> +#include <asm/user.h> + /* SH relocation types */ #define R_SH_NONE 0 #define R_SH_DIR32 1 @@ -46,9 +51,6 @@ * ELF register definitions.. */ -#include <asm/ptrace.h> -#include <asm/user.h> - typedef unsigned long elf_greg_t; #define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t)) @@ -91,7 +93,7 @@ typedef struct user_fpu_struct elf_fpregset_t; instruction set this CPU supports. This could be done in user space, but it's not easy, and we've already done it here. */ -#define ELF_HWCAP (0) +#define ELF_HWCAP (boot_cpu_data.flags) /* This yields a string that ld.so will use to load implementation specific libraries for optimization. This is more specific in diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h index 3b3ef4f2bf31..bdd472705546 100644 --- a/include/asm-sh/processor.h +++ b/include/asm-sh/processor.h @@ -14,6 +14,7 @@ #include <asm/types.h> #include <asm/cache.h> #include <asm/ptrace.h> +#include <asm/cpu-features.h> /* * Default implementation of macro that returns current @@ -127,17 +128,6 @@ union sh_fpu_union { struct sh_fpu_soft_struct soft; }; -/* - * Processor flags - */ - -#define CPU_HAS_FPU 0x0001 /* Hardware FPU support */ -#define CPU_HAS_P2_FLUSH_BUG 0x0002 /* Need to flush the cache in P2 area */ -#define CPU_HAS_MMU_PAGE_ASSOC 0x0004 /* SH3: TLB way selection bit support */ -#define CPU_HAS_DSP 0x0008 /* SH-DSP: DSP support */ -#define CPU_HAS_PERF_COUNTER 0x0010 /* Hardware performance counters */ -#define CPU_HAS_PTEA 0x0020 /* PTEA register */ - struct thread_struct { unsigned long sp; unsigned long pc; |