diff options
| author | Tobias Jakobi <tjakobi@math.uni-bielefeld.de> | 2017-08-22 16:19:38 +0200 |
|---|---|---|
| committer | Inki Dae <inki.dae@samsung.com> | 2017-08-25 12:05:56 +0900 |
| commit | 0f75269492c490e2a44ff4e3d52bbe31f60cfdb9 (patch) | |
| tree | 0a7cf44e95e134cc242eacf38e737b8d04fe5a38 /drivers | |
| parent | f40031c2314a592ff348193704e5f71e9a7e0449 (diff) | |
drm/exynos: mixer: simplify vp_video_buffer()
DRM core already checks in drm_atomic_plane_check() if the
pixelformat is valid. Hence we can drop the default case of
the switch statement and collapse most of the code.
Also rename the two booleans to reflect what true/false
actually means, and to avoid mixing CrCb/NV21 descriptions.
No functional change.
Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/exynos/exynos_mixer.c | 26 |
1 files changed, 6 insertions, 20 deletions
diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c index f9a06b8007c5..1a9dfc830754 100644 --- a/drivers/gpu/drm/exynos/exynos_mixer.c +++ b/drivers/gpu/drm/exynos/exynos_mixer.c @@ -484,32 +484,18 @@ static void vp_video_buffer(struct mixer_context *ctx, unsigned int priority = state->base.normalized_zpos + 1; unsigned long flags; dma_addr_t luma_addr[2], chroma_addr[2]; - bool tiled_mode = false; - bool crcb_mode = false; + bool is_tiled, is_nv21; u32 val; - switch (fb->format->format) { - case DRM_FORMAT_NV12: - crcb_mode = false; - break; - case DRM_FORMAT_NV21: - crcb_mode = true; - break; - default: - DRM_ERROR("pixel format for vp is wrong [%d].\n", - fb->format->format); - return; - } - - if (fb->modifier == DRM_FORMAT_MOD_SAMSUNG_64_32_TILE) - tiled_mode = true; + is_nv21 = (fb->format->format == DRM_FORMAT_NV21); + is_tiled = (fb->modifier == DRM_FORMAT_MOD_SAMSUNG_64_32_TILE); luma_addr[0] = exynos_drm_fb_dma_addr(fb, 0); chroma_addr[0] = exynos_drm_fb_dma_addr(fb, 1); if (mode->flags & DRM_MODE_FLAG_INTERLACE) { __set_bit(MXR_BIT_INTERLACE, &ctx->flags); - if (tiled_mode) { + if (is_tiled) { luma_addr[1] = luma_addr[0] + 0x40; chroma_addr[1] = chroma_addr[0] + 0x40; } else { @@ -529,8 +515,8 @@ static void vp_video_buffer(struct mixer_context *ctx, vp_reg_writemask(res, VP_MODE, val, VP_MODE_LINE_SKIP); /* setup format */ - val = (crcb_mode ? VP_MODE_NV21 : VP_MODE_NV12); - val |= (tiled_mode ? VP_MODE_MEM_TILED : VP_MODE_MEM_LINEAR); + val = (is_nv21 ? VP_MODE_NV21 : VP_MODE_NV12); + val |= (is_tiled ? VP_MODE_MEM_TILED : VP_MODE_MEM_LINEAR); vp_reg_writemask(res, VP_MODE, val, VP_MODE_FMT_MASK); /* setting size of input image */ |