diff options
author | Jeff Garzik <jgarzik@pobox.com> | 2005-09-21 22:34:08 -0400 |
---|---|---|
committer | Jeff Garzik <jgarzik@pobox.com> | 2005-09-21 22:34:08 -0400 |
commit | a3536c839f04682ed06c84a7f75968c27c6108c8 (patch) | |
tree | 92c26ea74c0ffb9b83a2285ad2539cc271b09856 /drivers/pci | |
parent | a33a1982012e9070736e3717231714dc9892303b (diff) | |
parent | efb0372bbaf5b829ff8c39db372779928af542a7 (diff) |
Merge /spare/repo/linux-2.6/
Diffstat (limited to 'drivers/pci')
-rw-r--r-- | drivers/pci/hotplug/ibmphp_pci.c | 2 | ||||
-rw-r--r-- | drivers/pci/hotplug/pciehp_ctrl.c | 4 | ||||
-rw-r--r-- | drivers/pci/hotplug/shpchp_ctrl.c | 3 | ||||
-rw-r--r-- | drivers/pci/pci.c | 16 |
4 files changed, 15 insertions, 10 deletions
diff --git a/drivers/pci/hotplug/ibmphp_pci.c b/drivers/pci/hotplug/ibmphp_pci.c index 8122fe734aa7..b1ba429e0a2d 100644 --- a/drivers/pci/hotplug/ibmphp_pci.c +++ b/drivers/pci/hotplug/ibmphp_pci.c @@ -558,7 +558,7 @@ static int configure_device (struct pci_func *func) pci_bus_write_config_byte (ibmphp_pci_bus, devfn, PCI_CACHE_LINE_SIZE, CACHE); pci_bus_write_config_byte (ibmphp_pci_bus, devfn, PCI_LATENCY_TIMER, LATENCY); - pci_bus_write_config_word (ibmphp_pci_bus, devfn, PCI_ROM_ADDRESS, 0x00L); + pci_bus_write_config_dword (ibmphp_pci_bus, devfn, PCI_ROM_ADDRESS, 0x00L); pci_bus_write_config_word (ibmphp_pci_bus, devfn, PCI_COMMAND, DEVICEENABLE); return 0; diff --git a/drivers/pci/hotplug/pciehp_ctrl.c b/drivers/pci/hotplug/pciehp_ctrl.c index 0e0947601526..898f6da6f0de 100644 --- a/drivers/pci/hotplug/pciehp_ctrl.c +++ b/drivers/pci/hotplug/pciehp_ctrl.c @@ -2526,7 +2526,6 @@ configure_new_function(struct controller *ctrl, struct pci_func *func, int cloop; u8 temp_byte; u8 class_code; - u16 temp_word; u32 rc; u32 temp_register; u32 base; @@ -2682,8 +2681,7 @@ configure_new_function(struct controller *ctrl, struct pci_func *func, } /* End of base register loop */ /* disable ROM base Address */ - temp_word = 0x00L; - rc = pci_bus_write_config_word (pci_bus, devfn, PCI_ROM_ADDRESS, temp_word); + rc = pci_bus_write_config_dword (pci_bus, devfn, PCI_ROM_ADDRESS, 0x00); /* Set HP parameters (Cache Line Size, Latency Timer) */ rc = pciehprm_set_hpp(ctrl, func, PCI_HEADER_TYPE_NORMAL); diff --git a/drivers/pci/hotplug/shpchp_ctrl.c b/drivers/pci/hotplug/shpchp_ctrl.c index 783b5abb0717..91c9903e621f 100644 --- a/drivers/pci/hotplug/shpchp_ctrl.c +++ b/drivers/pci/hotplug/shpchp_ctrl.c @@ -2824,8 +2824,7 @@ static int configure_new_function (struct controller * ctrl, struct pci_func * f } #endif /* Disable ROM base Address */ - temp_word = 0x00L; - rc = pci_bus_write_config_word (pci_bus, devfn, PCI_ROM_ADDRESS, temp_word); + rc = pci_bus_write_config_dword (pci_bus, devfn, PCI_ROM_ADDRESS, 0x00); /* Set HP parameters (Cache Line Size, Latency Timer) */ rc = shpchprm_set_hpp(ctrl, func, PCI_HEADER_TYPE_NORMAL); diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 992db89adce7..259d247b7551 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -309,17 +309,25 @@ pci_set_power_state(struct pci_dev *dev, pci_power_t state) pci_read_config_word(dev, pm + PCI_PM_CTRL, &pmcsr); - /* If we're in D3, force entire word to 0. + /* If we're (effectively) in D3, force entire word to 0. * This doesn't affect PME_Status, disables PME_En, and * sets PowerState to 0. */ - if (dev->current_state >= PCI_D3hot) { - if (!(pmcsr & PCI_PM_CTRL_NO_SOFT_RESET)) + switch (dev->current_state) { + case PCI_UNKNOWN: /* Boot-up */ + if ((pmcsr & PCI_PM_CTRL_STATE_MASK) == PCI_D3hot + && !(pmcsr & PCI_PM_CTRL_NO_SOFT_RESET)) need_restore = 1; + /* Fall-through: force to D0 */ + case PCI_D3hot: + case PCI_D3cold: + case PCI_POWER_ERROR: pmcsr = 0; - } else { + break; + default: pmcsr &= ~PCI_PM_CTRL_STATE_MASK; pmcsr |= state; + break; } /* enter specified state */ |