diff options
| author | Matt Carlson <mcarlson@broadcom.com> | 2010-12-06 08:28:53 +0000 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2010-12-06 11:03:48 -0800 |
| commit | a386b9011a4687470e6168e2f2a08c468f25f72f (patch) | |
| tree | 4f4c8d2dd7fe42d85e950302a71290d3db1fcc61 /drivers/net/tg3.c | |
| parent | a6b68dab169e2a51e59f43504f1279cbc2afcde8 (diff) | |
tg3: Relax EEE thresholds
The hardware defaults to fairly aggressive EEE thresholds. While there
appear to be no ill effects, this patch relaxes them, just as a
precaution.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Reviewed-by: Benjamin Li <benli@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.c')
| -rw-r--r-- | drivers/net/tg3.c | 25 |
1 files changed, 20 insertions, 5 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index 81dafc26cdff..bb95c6ecda49 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c @@ -7819,11 +7819,26 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy) tw32_f(TG3_CPMU_EEE_CTRL, TG3_CPMU_EEE_CTRL_EXIT_20_1_US); - tw32_f(TG3_CPMU_EEE_MODE, - TG3_CPMU_EEEMD_ERLY_L1_XIT_DET | - TG3_CPMU_EEEMD_LPI_IN_TX | - TG3_CPMU_EEEMD_LPI_IN_RX | - TG3_CPMU_EEEMD_EEE_ENABLE); + val = TG3_CPMU_EEEMD_ERLY_L1_XIT_DET | + TG3_CPMU_EEEMD_LPI_IN_TX | + TG3_CPMU_EEEMD_LPI_IN_RX | + TG3_CPMU_EEEMD_EEE_ENABLE; + + if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717) + val |= TG3_CPMU_EEEMD_SND_IDX_DET_EN; + + if (tp->tg3_flags3 & TG3_FLG3_ENABLE_APE) + val |= TG3_CPMU_EEEMD_APE_TX_DET_EN; + + tw32_f(TG3_CPMU_EEE_MODE, val); + + tw32_f(TG3_CPMU_EEE_DBTMR1, + TG3_CPMU_DBTMR1_PCIEXIT_2047US | + TG3_CPMU_DBTMR1_LNKIDLE_2047US); + + tw32_f(TG3_CPMU_EEE_DBTMR2, + TG3_CPMU_DBTMR1_APE_TX_2047US | + TG3_CPMU_DBTMR2_TXIDXEQ_2047US); } if (reset_phy) |