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authorGustavo Padovan <gustavo.padovan@collabora.co.uk>2015-09-30 18:40:54 -0300
committerInki Dae <inki.dae@samsung.com>2015-10-01 13:25:11 +0900
commit3c79fb8c9424a24bf812b9a8cb4f19b781052b0b (patch)
tree227cd6128ae5b02905dc4aef924287a7ecc97dae /drivers/gpu
parent148ba09c465cc54d8e68f041bf9a30332b315c39 (diff)
drm/exynos: fimd: actually disable dp clock
fimd_dp_clock_enable() was setting the always to enabled, this patch fix this to actually use the value that is set to 'val'. Reported-by: Emilio López <emilio.lopez@collabora.co.uk> Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Signed-off-by: Inki Dae <inki.dae@samsung.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_fimd.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index 03ad549e7698..3d1aba67758b 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -871,7 +871,7 @@ static void fimd_dp_clock_enable(struct exynos_drm_crtc *crtc, bool enable)
return;
val = enable ? DP_MIE_CLK_DP_ENABLE : DP_MIE_CLK_DISABLE;
- writel(DP_MIE_CLK_DP_ENABLE, ctx->regs + DP_MIE_CLKCON);
+ writel(val, ctx->regs + DP_MIE_CLKCON);
}
static const struct exynos_drm_crtc_ops fimd_crtc_ops = {