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| author | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2019-01-03 13:59:51 +0200 |
|---|---|---|
| committer | Andrzej Hajda <a.hajda@samsung.com> | 2019-01-09 10:49:30 +0100 |
| commit | 9a63bd6fe1b5590ffa42ae2ed22ee21363293e31 (patch) | |
| tree | 9a9b97eac63ceefee4ca33ea98a941016a8d20fa /crypto/adiantum.c | |
| parent | 4d9d54a730434cc068dd3515ba6116697196f77b (diff) | |
drm/bridge: tc358767: fix initial DP0/1_SRCCTRL value
Initially DP0_SRCCTRL is set to a static value which includes
DP0_SRCCTRL_LANES_2 and DP0_SRCCTRL_BW27, even when only 1 lane of
1.62Gbps speed is used. DP1_SRCCTRL is configured to a magic number.
This patch changes the configuration as follows:
Configure DP0_SRCCTRL by using tc_srcctrl() which provides the correct
value.
DP1_SRCCTRL needs two bits to be set to the same value as DP0_SRCCTRL:
SSCG and BW27. All other bits can be zero.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190103115954.12785-5-tomi.valkeinen@ti.com
Diffstat (limited to 'crypto/adiantum.c')
0 files changed, 0 insertions, 0 deletions