summaryrefslogtreecommitdiff
path: root/arch
diff options
context:
space:
mode:
authorBjorn Helgaas <bhelgaas@google.com>2019-03-06 15:30:19 -0600
committerBjorn Helgaas <bhelgaas@google.com>2019-03-06 15:30:19 -0600
commit2506419e06d4fda627376631e2619dec61b60968 (patch)
tree1e5691267cf27e1bb7125286458fb79296c4e630 /arch
parent0c65bb7ae9aa0469ab0b84b35f38fccf0c7c55c9 (diff)
parent3afc8299f39a27b60e1519a28e18878ce878e7dd (diff)
Merge branch 'remotes/lorenzo/pci/dwc'
- Add dra72x/dra74x/dra76x SoC compatible strings (Kishon Vijay Abraham I) - Enable x2 mode support for dra72x/dra74x/dra76x SoC (Kishon Vijay Abraham I) - Configure dra7xx PHY to PCIe mode (Kishon Vijay Abraham I) - Simplify dwc (remove unnecessary header includes, name variables consistently, reduce inverted logic, etc) (Gustavo Pimentel) - Add i.MX8MQ support (Andrey Smirnov) - Add message to help debug dwc MSI-X mask bit errors (Gustavo Pimentel) - Work around imx7d PCIe PLL erratum (Trent Piepho) - Don't assert qcom reset GPIO during probe (Bjorn Andersson) - Skip dwc MSI init if MSIs have been disabled (Lucas Stach) * remotes/lorenzo/pci/dwc: PCI: dwc: skip MSI init if MSIs have been explicitly disabled PCI: dwc: Remove superfluous shifting in definitions PCI: dwc: Make use of GENMASK/FIELD_PREP PCI: dwc: Make use of BIT() in constant definitions PCI: dwc: Share code for dw_pcie_rd/wr_other_conf() PCI: dwc: Make use of IS_ALIGNED() PCI: imx6: Add code to request/control "pcie_aux" clock for i.MX8MQ dt-bindings: imx6q-pcie: Add "pcie_aux" clock for imx8mq PCI: qcom: Don't deassert reset GPIO during probe PCI: imx: Add workaround for e10728, IMX7d PCIe PLL failure ARM: dts: imx7d: Add node for PCIe PHY dt-bindings: imx6q-pcie: Add description of imx7d pcie phy PCI: dwc: Print debug error message when MSI-X entry control mask bit is set PCI: imx6: Add support for i.MX8MQ PCI: imx6: Convert DIRECT_SPEED_CHANGE quirk code to use a flag PCI: imx6: Mark PHY functions as i.MX6 specific PCI: imx6: Introduce drvdata PCI: dwc: Replace bit rotation operation (1 << bit) with BIT(bit) PCI: dwc: Improve code readability and simplify mask/unmask operations PCI: dwc: Rename variable name from data to d on dw_pcie_irq_domain_free() PCI: dwc: Rename variable name from data to d on dw_pci_msi_set_affinity() PCI: dwc: Rename variable name from data to d on dw_pci_setup_msi_msg() PCI: dwc: Rename variable name from data to d on dw_pci_bottom_mask/unmask() PCI: dwc: Remove unnecessary header include (signal.h) PCI: dwc: Remove unnecessary header include (of_gpio.h) PCI: dwc: dra7xx: Invoke phy_set_mode() API to set PHY mode to PHY_MODE_PCIE PCI: dwc: dra7xx: Enable x2 mode support for dra74x, dra76x and dra72x dt-bindings: PCI: dra7xx: Add properties to enable x2 lane in dra7 dt-bindings: PCI: dra7xx: Add SoC specific compatible strings
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/imx7d.dtsi9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi
index 6b298e388f4b..6eb98e7c568d 100644
--- a/arch/arm/boot/dts/imx7d.dtsi
+++ b/arch/arm/boot/dts/imx7d.dtsi
@@ -96,6 +96,14 @@
};
};
+&aips2 {
+ pcie_phy: pcie-phy@306d0000 {
+ compatible = "fsl,imx7d-pcie-phy";
+ reg = <0x306d0000 0x10000>;
+ status = "disabled";
+ };
+};
+
&aips3 {
usbotg2: usb@30b20000 {
compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
@@ -173,6 +181,7 @@
<&src IMX7_RESET_PCIE_CTRL_APPS_EN>,
<&src IMX7_RESET_PCIE_CTRL_APPS_TURNOFF>;
reset-names = "pciephy", "apps", "turnoff";
+ fsl,imx7d-pcie-phy = <&pcie_phy>;
status = "disabled";
};
};