diff options
| author | Jiaxun Yang <jiaxun.yang@flygoat.com> | 2024-07-14 10:20:48 +0800 |
|---|---|---|
| committer | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2024-07-15 18:17:07 +0200 |
| commit | 10f338bd0a42140d8a18a31c89309c5a03e38fc2 (patch) | |
| tree | e0b1e88ec3dd7f12fb128d83d68f45ef434558e9 /arch | |
| parent | 9ce4250eeed47d732015c459726fc2c32481395f (diff) | |
MIPS: config: generic: Add board-litex
The LiteX framework provides a convenient and efficient infrastructure
to create FPGA Cores/SoCs.
We have implemented LiteX support for a couple of opensource MIPS
CPU cores including microAptiv UP from MIPS, GS232 from Loongson,
and CDIM from CQU.
For this platform, devicetree is generated by litex python scripts
so there is no devicetree addition necessary.
Link: https://github.com/enjoy-digital/litex/pull/1990
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/mips/configs/generic/board-litex.config | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/mips/configs/generic/board-litex.config b/arch/mips/configs/generic/board-litex.config new file mode 100644 index 000000000000..f372d0647bfc --- /dev/null +++ b/arch/mips/configs/generic/board-litex.config @@ -0,0 +1,8 @@ +CONFIG_LITEX_LITEETH=y +CONFIG_SERIAL_LITEUART=y +CONFIG_SERIAL_LITEUART_CONSOLE=y +CONFIG_MMC=y +CONFIG_MMC_LITEX=y +CONFIG_LITEX_SOC_CONTROLLER=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_HCD_PLATFORM=y |